From: "Cédric Le Goater" <clg@kaod.org>
To: Greg Kurz <groug@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: Re: [PATCH for-5.0 v5 01/23] ppc/xive: Record the IPB in the associated NVT
Date: Mon, 18 Nov 2019 16:57:26 +0100 [thread overview]
Message-ID: <34679878-fa5d-2e03-f699-5e6218fe4f08@kaod.org> (raw)
In-Reply-To: <20191118164411.2045c2e2@bahia.lan>
On 18/11/2019 16:44, Greg Kurz wrote:
> On Fri, 15 Nov 2019 17:24:14 +0100
> Cédric Le Goater <clg@kaod.org> wrote:
>
>> When an interrupt can not be presented to a vCPU, because it is not
>> running on any of the HW treads, the XIVE presenter updates the
>> Interrupt Pending Buffer register of the associated XIVE NVT
>> structure. This is only done if backlog is activated in the END but
>> this is generally the case.
>>
>> The current code assumes that the fields of the NVT structure is
>> architected with the same layout of the thread interrupt context
>> registers. Fix this assumption and define an offset for the IPB
>> register backup value in the NVT.
>>
>
> Does this fix a visible bug in the powernv machine ? If so,
> maybe worth describing the symptoms.
no. this is a preliminary work for escalation suppport and to dump
the contents of the NVT table.
> Anyway, this seems conforment to the XIVE spec I have, so FWIW:
FYI, the NVT structure evolves in the XIVE2 specs.
C.
> Reviewed-by: Greg Kurz <groug@kaod.org>
>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>> include/hw/ppc/xive_regs.h | 1 +
>> hw/intc/xive.c | 11 +++++++++--
>> 2 files changed, 10 insertions(+), 2 deletions(-)
>>
>> diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
>> index 55307cd1533c..530f232b04f8 100644
>> --- a/include/hw/ppc/xive_regs.h
>> +++ b/include/hw/ppc/xive_regs.h
>> @@ -255,6 +255,7 @@ typedef struct XiveNVT {
>> uint32_t w2;
>> uint32_t w3;
>> uint32_t w4;
>> +#define NVT_W4_IPB PPC_BITMASK32(16, 23)
>> uint32_t w5;
>> uint32_t w6;
>> uint32_t w7;
>> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
>> index 3d472e29c858..177663d2b43e 100644
>> --- a/hw/intc/xive.c
>> +++ b/hw/intc/xive.c
>> @@ -1607,14 +1607,21 @@ static void xive_router_end_notify(XiveRouter *xrtr, uint8_t end_blk,
>> * - logical server : forward request to IVPE (not supported)
>> */
>> if (xive_end_is_backlog(&end)) {
>> + uint8_t ipb;
>> +
>> if (format == 1) {
>> qemu_log_mask(LOG_GUEST_ERROR,
>> "XIVE: END %x/%x invalid config: F1 & backlog\n",
>> end_blk, end_idx);
>> return;
>> }
>> - /* Record the IPB in the associated NVT structure */
>> - ipb_update((uint8_t *) &nvt.w4, priority);
>> + /*
>> + * Record the IPB in the associated NVT structure for later
>> + * use. The presenter will resend the interrupt when the vCPU
>> + * is dispatched again on a HW thread.
>> + */
>> + ipb = xive_get_field32(NVT_W4_IPB, nvt.w4) | priority_to_ipb(priority);
>> + nvt.w4 = xive_set_field32(NVT_W4_IPB, nvt.w4, ipb);
>> xive_router_write_nvt(xrtr, nvt_blk, nvt_idx, &nvt, 4);
>>
>> /*
>
next prev parent reply other threads:[~2019-11-18 15:58 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-15 16:24 [PATCH for-5.0 v5 00/23] ppc/pnv: add XIVE support for KVM guests Cédric Le Goater
2019-11-15 16:24 ` [PATCH for-5.0 v5 01/23] ppc/xive: Record the IPB in the associated NVT Cédric Le Goater
2019-11-18 15:44 ` Greg Kurz
2019-11-18 15:57 ` Cédric Le Goater [this message]
2019-11-19 3:18 ` David Gibson
2019-11-15 16:24 ` [PATCH for-5.0 v5 02/23] ppc/xive: Introduce helpers for the NVT id Cédric Le Goater
2019-11-19 3:19 ` David Gibson
2019-11-19 14:04 ` Greg Kurz
2019-11-19 16:12 ` Cédric Le Goater
2019-11-15 16:24 ` [PATCH for-5.0 v5 03/23] ppc/pnv: Remove pnv_xive_vst_size() routine Cédric Le Goater
2019-11-19 3:22 ` David Gibson
2019-11-15 16:24 ` [PATCH for-5.0 v5 04/23] ppc/pnv: Dump the XIVE NVT table Cédric Le Goater
2019-11-19 22:06 ` David Gibson
2019-11-20 8:39 ` Cédric Le Goater
2019-11-15 16:24 ` [PATCH for-5.0 v5 05/23] ppc/pnv: Quiesce some XIVE errors Cédric Le Goater
2019-11-19 22:07 ` David Gibson
2019-11-15 16:24 ` [PATCH for-5.0 v5 06/23] ppc/xive: Introduce OS CAM line helpers Cédric Le Goater
2019-11-20 3:24 ` David Gibson
2019-11-15 16:24 ` [PATCH for-5.0 v5 07/23] ppc/xive: Check V bit in TM_PULL_POOL_CTX Cédric Le Goater
2019-11-20 3:25 ` David Gibson
2019-11-15 16:24 ` [PATCH for-5.0 v5 08/23] ppc/xive: Introduce a XivePresenter interface Cédric Le Goater
2019-11-20 9:35 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 09/23] ppc/xive: Implement the " Cédric Le Goater
2019-11-20 10:18 ` Greg Kurz
2019-11-20 10:45 ` Cédric Le Goater
2019-11-15 16:24 ` [PATCH for-5.0 v5 10/23] ppc/pnv: Loop on the threads of the chip to find a matching NVT Cédric Le Goater
2019-11-20 16:13 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 11/23] ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper Cédric Le Goater
2019-11-20 17:26 ` Greg Kurz
2019-11-20 21:40 ` Cédric Le Goater
2019-11-21 7:58 ` Greg Kurz
2019-11-21 9:16 ` Cédric Le Goater
2019-11-21 9:49 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 12/23] ppc/xive: Introduce a XiveFabric interface Cédric Le Goater
2019-11-20 17:27 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 13/23] ppc/pnv: Implement the " Cédric Le Goater
2019-11-20 17:41 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 14/23] ppc/spapr: " Cédric Le Goater
2019-11-20 17:53 ` Greg Kurz
2019-11-21 6:56 ` Cédric Le Goater
2019-11-21 7:24 ` Greg Kurz
2019-11-21 7:38 ` Cédric Le Goater
2019-11-15 16:24 ` [PATCH for-5.0 v5 15/23] ppc/xive: Use the XiveFabric and XivePresenter interfaces Cédric Le Goater
2019-11-20 18:30 ` Greg Kurz
2019-11-21 7:01 ` Cédric Le Goater
2019-11-21 7:30 ` Greg Kurz
2019-11-21 7:40 ` Cédric Le Goater
2019-11-21 8:08 ` Greg Kurz
2019-11-21 9:22 ` Cédric Le Goater
2019-11-21 9:56 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 16/23] ppc/xive: Extend the TIMA operation with a XivePresenter parameter Cédric Le Goater
2019-11-22 10:16 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 17/23] ppc/pnv: Clarify how the TIMA is accessed on a multichip system Cédric Le Goater
2019-11-22 13:54 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 18/23] ppc/xive: Move the TIMA operations to the controller model Cédric Le Goater
2019-11-22 14:58 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 19/23] ppc/xive: Remove the get_tctx() XiveRouter handler Cédric Le Goater
2019-11-22 14:07 ` Greg Kurz
2019-11-15 16:24 ` [PATCH for-5.0 v5 20/23] ppc/xive: Introduce a xive_tctx_ipb_update() helper Cédric Le Goater
2019-11-15 16:24 ` [PATCH for-5.0 v5 21/23] ppc/xive: Synthesize interrupt from the saved IPB in the NVT Cédric Le Goater
2019-11-15 16:24 ` [PATCH for-5.0 v5 22/23] ppc/pnv: Introduce a pnv_xive_block_id() helper Cédric Le Goater
2019-11-15 16:24 ` [PATCH for-5.0 v5 23/23] ppc/pnv: Extend XiveRouter with a get_block_id() handler Cédric Le Goater
2019-11-22 18:17 ` [PATCH for-5.0 v5 00/23] ppc/pnv: add XIVE support for KVM guests Cédric Le Goater
2019-11-23 9:25 ` David Gibson
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