From: Richard Henderson <richard.henderson@linaro.org>
To: Alistair Francis <alistair.francis@wdc.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: alistair23@gmail.com, bmeng.cn@gmail.com, palmer@dabbelt.com
Subject: Re: [PATCH v2 4/9] target/riscv: Remove the hardcoded MSTATUS_SD macro
Date: Tue, 13 Apr 2021 20:13:36 -0700 [thread overview]
Message-ID: <5948b55e-a769-59f2-8ef5-0b0e33dcb4b0@linaro.org> (raw)
In-Reply-To: <2d6d0483c1a1e7aedd1c410b34812ea8e076cb33.1618356725.git.alistair.francis@wdc.com>
On 4/13/21 4:33 PM, Alistair Francis wrote:
> +#ifndef CONFIG_USER_ONLY
> +# ifdef TARGET_RISCV32
> +# define is_32bit(ctx) true
> +# else
> +static inline bool is_32bit(DisasContext *ctx)
> +{
> + return !(ctx->misa & RV64);
> +}
> +# endif
> +#endif
It's going to be soon enough when this is used by user-only too.
I'd structure this as
#ifdef TARGET_RISCV32
# define is_32bit(ctx) true
#elif defined(CONFIG_USER_ONLY)
# define is_32bit(ctx) false
#else
static inline...
#endif
> tmp = tcg_temp_new();
> + sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD;
> +
> +
> tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
Careful with the extra whitespace.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-04-14 3:14 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-13 23:32 [PATCH v2 0/9] RISC-V: Steps towards running 32-bit guests on Alistair Francis
2021-04-13 23:33 ` [PATCH v2 1/9] target/riscv: Remove the hardcoded RVXLEN macro Alistair Francis
2021-04-14 7:59 ` Bin Meng
2021-04-13 23:33 ` [PATCH v2 2/9] target/riscv: Remove the hardcoded SSTATUS_SD macro Alistair Francis
2021-04-14 7:59 ` Bin Meng
2021-04-13 23:33 ` [PATCH v2 3/9] target/riscv: Remove the hardcoded HGATP_MODE macro Alistair Francis
2021-04-14 7:59 ` Bin Meng
2021-04-13 23:33 ` [PATCH v2 4/9] target/riscv: Remove the hardcoded MSTATUS_SD macro Alistair Francis
2021-04-14 3:13 ` Richard Henderson [this message]
2021-04-13 23:34 ` [PATCH v2 5/9] target/riscv: Remove the hardcoded SATP_MODE macro Alistair Francis
2021-04-14 3:14 ` Richard Henderson
2021-04-14 8:00 ` Bin Meng
2021-04-13 23:34 ` [PATCH v2 6/9] target/riscv: Remove the unused HSTATUS_WPRI macro Alistair Francis
2021-04-14 8:00 ` Bin Meng
2021-04-13 23:34 ` [PATCH v2 7/9] target/riscv: Remove an unused CASE_OP_32_64 macro Alistair Francis
2021-04-14 8:00 ` Bin Meng
2021-04-13 23:34 ` [PATCH v2 8/9] target/riscv: Consolidate RV32/64 32-bit instructions Alistair Francis
2021-04-14 3:42 ` Richard Henderson
2021-04-22 2:01 ` Alistair Francis
2021-04-13 23:34 ` [PATCH v2 9/9] target/riscv: Consolidate RV32/64 16-bit instructions Alistair Francis
2021-04-14 3:57 ` Richard Henderson
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