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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH 3/6] hw/pci-host/sabre: Simplify code initializing variable once
Date: Mon, 19 Oct 2020 20:06:03 +0100	[thread overview]
Message-ID: <7439e76f-8789-5e93-ce14-f85ae660cd2a@ilande.co.uk> (raw)
In-Reply-To: <20201012170950.3491912-4-f4bug@amsat.org>

On 12/10/2020 18:09, Philippe Mathieu-Daudé wrote:

> We only need to zero-initialize 'val' once.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>   hw/pci-host/sabre.c | 12 +-----------
>   1 file changed, 1 insertion(+), 11 deletions(-)
> 
> diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c
> index 0889c9369f6..3645bc962cb 100644
> --- a/hw/pci-host/sabre.c
> +++ b/hw/pci-host/sabre.c
> @@ -195,32 +195,25 @@ static uint64_t sabre_config_read(void *opaque,
>                                     hwaddr addr, unsigned size)
>   {
>       SabreState *s = opaque;
> -    uint32_t val;
> +    uint32_t val = 0;
>   
>       switch (addr) {
>       case 0x30 ... 0x4f: /* DMA error registers */
> -        val = 0;
>           /* XXX: not implemented yet */
>           break;
>       case 0xc00 ... 0xc3f: /* PCI interrupt control */
>           if (addr & 4) {
>               val = s->pci_irq_map[(addr & 0x3f) >> 3];
> -        } else {
> -            val = 0;
>           }
>           break;
>       case 0x1000 ... 0x107f: /* OBIO interrupt control */
>           if (addr & 4) {
>               val = s->obio_irq_map[(addr & 0xff) >> 3];
> -        } else {
> -            val = 0;
>           }
>           break;
>       case 0x1080 ... 0x108f: /* PCI bus error */
>           if (addr & 4) {
>               val = s->pci_err_irq_map[(addr & 0xf) >> 3];
> -        } else {
> -            val = 0;
>           }
>           break;
>       case 0x2000 ... 0x202f: /* PCI control */
> @@ -229,8 +222,6 @@ static uint64_t sabre_config_read(void *opaque,
>       case 0xf020 ... 0xf027: /* Reset control */
>           if (addr & 4) {
>               val = s->reset_control;
> -        } else {
> -            val = 0;
>           }
>           break;
>       case 0x5000 ... 0x51cf: /* PIO/DMA diagnostics */
> @@ -239,7 +230,6 @@ static uint64_t sabre_config_read(void *opaque,
>       case 0xf000 ... 0xf01f: /* FFB config, memory control */
>           /* we don't care */
>       default:
> -        val = 0;
>           break;
>       }
>       trace_sabre_config_read(addr, val);

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>


ATB,

Mark.


  reply	other threads:[~2020-10-19 19:07 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-12 17:09 [PATCH 0/6] hw/pci-host/sabre: Report UNIMP/GUEST_ERROR accesses Philippe Mathieu-Daudé
2020-10-12 17:09 ` [PATCH 1/6] hw/pci-host/sabre: Update documentation link Philippe Mathieu-Daudé
2020-10-19 19:01   ` Mark Cave-Ayland
2020-10-12 17:09 ` [PATCH 2/6] hw/pci-host/sabre: Remove superfluous address range check Philippe Mathieu-Daudé
2020-10-19 19:02   ` Mark Cave-Ayland
2020-10-12 17:09 ` [PATCH 3/6] hw/pci-host/sabre: Simplify code initializing variable once Philippe Mathieu-Daudé
2020-10-19 19:06   ` Mark Cave-Ayland [this message]
2020-10-12 17:09 ` [PATCH 4/6] hw/pci-host/sabre: Report unimplemented accesses via UNIMP log_mask Philippe Mathieu-Daudé
2020-10-19 21:52   ` Mark Cave-Ayland
2020-10-12 17:09 ` [PATCH 5/6] hw/pci-host/sabre: Report IOMMU address range as unimplemented Philippe Mathieu-Daudé
2020-10-19 21:57   ` Mark Cave-Ayland
2020-10-12 17:09 ` [PATCH 6/6] hw/pci-host/sabre: Log reserved address accesses as GUEST_ERROR Philippe Mathieu-Daudé
2020-10-19 21:58   ` Mark Cave-Ayland
2020-10-19 22:01 ` [PATCH 0/6] hw/pci-host/sabre: Report UNIMP/GUEST_ERROR accesses Mark Cave-Ayland

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