From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Alistair Francis <alistair@alistair23.me>,
Xuzhou Cheng <xuzhou.cheng@windriver.com>,
Bin Meng <bin.meng@windriver.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Jean-Christophe Dubois <jcd@tribudubois.net>,
qemu-arm <qemu-arm@nongnu.org>,
Peter Chubb <peter.chubb@nicta.com.au>
Subject: Re: [RFC PATCH v6 00/11] hw/ssi: imx_spi: Fix various bugs in the imx_spi model
Date: Wed, 13 Jan 2021 18:56:36 +0100 [thread overview]
Message-ID: <7c8e33c2-d86a-44ef-8d4c-0f6dcf9f7b2c@amsat.org> (raw)
In-Reply-To: <CAEUhbmU4wDdjY+nEiqHFpFsa6H1vJVpAitSjKt1+p1POEAONEQ@mail.gmail.com>
On 1/13/21 2:27 PM, Bin Meng wrote:
> Hi Philippe,
>
> On Wed, Jan 13, 2021 at 3:53 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>
>> Hi Ben,
>>
>> On 1/13/21 4:29 AM, Bin Meng wrote:
>>> On Wed, Jan 13, 2021 at 2:35 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>>>
>>>> Hi,
>>>>
>>>> As it is sometimes harder for me to express myself in plain
>>>> English, I found it easier to write the patches I was thinking
>>>> about. I know this doesn't scale.
>>>>
>>>> So this is how I understand the ecSPI reset works, after
>>>> looking at the IMX6DQRM.pdf datasheet.
>>>>
>>>> This is a respin of Ben's v5 series [*].
>>>> Tagged RFC because I have not tested it :)
>>>
>>> Unfortunately this series breaks SPI flash testing under both U-Boot
>>> and VxWorks 7.
>>
>> Thanks for testing :) Can you provide the binary tested and the command
>> line used? At least one, so I can have a look.
>
> Sure, will send you offline.
Arf, stupid mistake in patch 7 :) With this diff I can run your
test:
-- >8 --
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -343,7 +343,7 @@ static void imx_spi_write(void *opaque, hwaddr
offset, uint64_t value,
return;
}
s->regs[ECSPI_CONREG] = value;
- if (value & ECSPI_CONREG_EN) {
+ if (!(value & ECSPI_CONREG_EN)) {
/* Keep disabled */
return;
}
---
Regards,
Phil.
next prev parent reply other threads:[~2021-01-13 17:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-12 18:35 [RFC PATCH v6 00/11] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 01/11] hw/ssi: imx_spi: Use a macro for number of chip selects supported Philippe Mathieu-Daudé
2021-01-13 13:35 ` Juan Quintela
2021-01-12 18:35 ` [RFC PATCH v6 02/11] hw/ssi: imx_spi: Remove pointless variable initialization Philippe Mathieu-Daudé
2021-01-13 13:35 ` Juan Quintela
2021-01-12 18:35 ` [RFC PATCH v6 03/11] hw/ssi: imx_spi: Convert some debug printf()s to trace events Philippe Mathieu-Daudé
2021-01-13 13:36 ` Juan Quintela
2021-01-12 18:35 ` [RFC PATCH v6 04/11] hw/ssi: imx_spi: Reduce 'change_mask' variable scope Philippe Mathieu-Daudé
2021-01-13 13:41 ` Juan Quintela
2021-01-13 13:47 ` Juan Quintela
2021-01-15 15:24 ` Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 05/11] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value Philippe Mathieu-Daudé
2021-01-13 13:43 ` Juan Quintela
2021-01-12 18:35 ` [RFC PATCH v6 06/11] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled Philippe Mathieu-Daudé
2021-01-13 13:46 ` Juan Quintela
2021-01-12 18:35 ` [RFC PATCH v6 07/11] hw/ssi: imx_spi: Rework imx_spi_write() " Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 08/11] hw/ssi: imx_spi: Disable chip selects when controller is disabled Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 09/11] hw/ssi: imx_spi: Round up the burst length to be multiple of 8 Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 10/11] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 11/11] hw/ssi: imx_spi: Correct tx and rx fifo endianness Philippe Mathieu-Daudé
2021-01-13 3:29 ` [RFC PATCH v6 00/11] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-13 7:53 ` Philippe Mathieu-Daudé
2021-01-13 13:27 ` Bin Meng
2021-01-13 14:16 ` Bin Meng
2021-01-13 17:56 ` Philippe Mathieu-Daudé [this message]
2021-01-14 16:00 ` Philippe Mathieu-Daudé
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