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From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: Alistair Francis <alistair23@gmail.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	"open list:RISC-V" <qemu-riscv@nongnu.org>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v3 4/7] target/riscv: Update the Hypervisor CSRs to v0.4
Date: Fri, 16 Aug 2019 21:59:15 +0800
Message-ID: <CAEUhbmUZ8Vjaqc9mOE0O6KhsUF2-nGUM+YVymSnez6Dh449Fig@mail.gmail.com> (raw)
In-Reply-To: <59bed3d7342ef7513a60285e2711c162be5559fc.1565904855.git.alistair.francis@wdc.com>

On Fri, Aug 16, 2019 at 5:41 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Update the Hypervisor CSR addresses to match the v0.4 spec.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com>
> ---
>  target/riscv/cpu_bits.h | 35 ++++++++++++++++++-----------------
>  1 file changed, 18 insertions(+), 17 deletions(-)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


  reply index

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-15 21:34 [Qemu-devel] [PATCH v3 0/7] RISC-V: Hypervisor prep work part 2 Alistair Francis
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 1/7] target/riscv: Don't set write permissions on dirty PTEs Alistair Francis
2019-08-16 13:59   ` Bin Meng
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 2/7] riscv: plic: Remove unused interrupt functions Alistair Francis
2019-08-16 13:59   ` Bin Meng
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 3/7] target/riscv: Create function to test if FP is enabled Alistair Francis
2019-08-16 13:59   ` Bin Meng
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 4/7] target/riscv: Update the Hypervisor CSRs to v0.4 Alistair Francis
2019-08-16 13:59   ` Bin Meng [this message]
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 5/7] target/riscv: Use both register name and ABI name Alistair Francis
2019-08-16 13:59   ` Bin Meng
2019-08-15 21:35 ` [Qemu-devel] [PATCH v3 6/7] target/riscv: Fix mstatus dirty mask Alistair Francis
2019-08-16 13:59   ` Bin Meng
2019-08-15 21:35 ` [Qemu-devel] [PATCH v3 7/7] target/riscv: Convert mip to target_ulong Alistair Francis
2019-08-16 13:59   ` Bin Meng
2019-08-23 15:18   ` Alistair Francis
2019-08-15 22:13 ` [Qemu-devel] [PATCH v3 0/7] RISC-V: Hypervisor prep work part 2 no-reply

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