From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: Alistair Francis <alistair23@gmail.com>,
Palmer Dabbelt <palmer@sifive.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v3 2/7] riscv: plic: Remove unused interrupt functions
Date: Fri, 16 Aug 2019 21:59:08 +0800 [thread overview]
Message-ID: <CAEUhbmXq0oVL3epXs3tMyrum1BsYurb-T3D=H-W8Qe+sJ1vN0Q@mail.gmail.com> (raw)
In-Reply-To: <9ecf08f99b17a0547cc5cc7a427453ce20389b4b.1565904855.git.alistair.francis@wdc.com>
On Fri, Aug 16, 2019 at 5:44 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> Reviewed-by: Jonathan Behrens <fintelia@gmail.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com>
> ---
> hw/riscv/sifive_plic.c | 12 ------------
> include/hw/riscv/sifive_plic.h | 3 ---
> 2 files changed, 15 deletions(-)
>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
next prev parent reply other threads:[~2019-08-16 14:03 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-15 21:34 [Qemu-devel] [PATCH v3 0/7] RISC-V: Hypervisor prep work part 2 Alistair Francis
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 1/7] target/riscv: Don't set write permissions on dirty PTEs Alistair Francis
2019-08-16 13:59 ` Bin Meng
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 2/7] riscv: plic: Remove unused interrupt functions Alistair Francis
2019-08-16 13:59 ` Bin Meng [this message]
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 3/7] target/riscv: Create function to test if FP is enabled Alistair Francis
2019-08-16 13:59 ` Bin Meng
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 4/7] target/riscv: Update the Hypervisor CSRs to v0.4 Alistair Francis
2019-08-16 13:59 ` Bin Meng
2019-08-15 21:34 ` [Qemu-devel] [PATCH v3 5/7] target/riscv: Use both register name and ABI name Alistair Francis
2019-08-16 13:59 ` Bin Meng
2019-08-15 21:35 ` [Qemu-devel] [PATCH v3 6/7] target/riscv: Fix mstatus dirty mask Alistair Francis
2019-08-16 13:59 ` Bin Meng
2019-08-15 21:35 ` [Qemu-devel] [PATCH v3 7/7] target/riscv: Convert mip to target_ulong Alistair Francis
2019-08-16 13:59 ` Bin Meng
2019-08-23 15:18 ` Alistair Francis
2019-08-15 22:13 ` [Qemu-devel] [PATCH v3 0/7] RISC-V: Hypervisor prep work part 2 no-reply
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAEUhbmXq0oVL3epXs3tMyrum1BsYurb-T3D=H-W8Qe+sJ1vN0Q@mail.gmail.com' \
--to=bmeng.cn@gmail.com \
--cc=alistair.francis@wdc.com \
--cc=alistair23@gmail.com \
--cc=palmer@sifive.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).