qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: Laurent Desnogues <laurent.desnogues@gmail.com>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH 15/20] target/arm: Fix sve_uzp_p vs odd vector lengths
Date: Tue, 25 Aug 2020 14:43:18 +0100	[thread overview]
Message-ID: <CAFEAcA9KPLqMkzT1ckdQPniJJ9y180YncJxfJ3W4TC_tvq9csg@mail.gmail.com> (raw)
In-Reply-To: <20200815013145.539409-16-richard.henderson@linaro.org>

On Sat, 15 Aug 2020 at 02:32, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Missed out on compressing the second half of a predicate
> with length vl % 512 > 256.
>
> Adjust all of the x + (y << s) to x | (y << s) as a
> general style fix.
>
> Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/sve_helper.c | 30 +++++++++++++++++++++---------
>  1 file changed, 21 insertions(+), 9 deletions(-)
>
> diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
> index 4758d46f34..fcb46f150f 100644
> --- a/target/arm/sve_helper.c
> +++ b/target/arm/sve_helper.c
> @@ -1938,7 +1938,7 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm, uint32_t pred_desc)
>      if (oprsz <= 8) {
>          l = compress_bits(n[0] >> odd, esz);
>          h = compress_bits(m[0] >> odd, esz);
> -        d[0] = extract64(l + (h << (4 * oprsz)), 0, 8 * oprsz);
> +        d[0] = l | (h << (4 * oprsz));

Why did we drop the extract64() here ? This doesn't seem
to correspond to either of the things the commit message
says we're doing.

Also, if oprsz is < 8, don't we need to mask out the high
bits in l that would otherwise overlap with h << (4 * oprsz) ?
Are they guaranteed zeroes somehow?

>      } else {
>          ARMPredicateReg tmp_m;
>          intptr_t oprsz_16 = oprsz / 16;
> @@ -1952,23 +1952,35 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm, uint32_t pred_desc)
>              h = n[2 * i + 1];
>              l = compress_bits(l >> odd, esz);
>              h = compress_bits(h >> odd, esz);
> -            d[i] = l + (h << 32);
> +            d[i] = l | (h << 32);
>          }
>
> -        /* For VL which is not a power of 2, the results from M do not
> -           align nicely with the uint64_t for D.  Put the aligned results
> -           from M into TMP_M and then copy it into place afterward.  */
> +        /*
> +         * For VL which is not a multiple of 512, the results from M do not
> +         * align nicely with the uint64_t for D.  Put the aligned results
> +         * from M into TMP_M and then copy it into place afterward.
> +         */
>          if (oprsz & 15) {
> -            d[i] = compress_bits(n[2 * i] >> odd, esz);
> +            int final_shift = (oprsz & 15) * 2;
> +
> +            l = n[2 * i + 0];
> +            h = n[2 * i + 1];
> +            l = compress_bits(l >> odd, esz);
> +            h = compress_bits(h >> odd, esz);
> +            d[i] = l | (h << final_shift);

Similarly here, why don't we need to mask out the top parts of l and h ?

>
>              for (i = 0; i < oprsz_16; i++) {
>                  l = m[2 * i + 0];
>                  h = m[2 * i + 1];
>                  l = compress_bits(l >> odd, esz);
>                  h = compress_bits(h >> odd, esz);
> -                tmp_m.p[i] = l + (h << 32);
> +                tmp_m.p[i] = l | (h << 32);
>              }
> -            tmp_m.p[i] = compress_bits(m[2 * i] >> odd, esz);
> +            l = m[2 * i + 0];
> +            h = m[2 * i + 1];
> +            l = compress_bits(l >> odd, esz);
> +            h = compress_bits(h >> odd, esz);
> +            tmp_m.p[i] = l | (h << final_shift);
>
>              swap_memmove(vd + oprsz / 2, &tmp_m, oprsz / 2);

Aren't there cases where the 'n' part of the result doesn't
end up a whole number of bytes and we have to do a shift as
well as a byte copy?

>          } else {
> @@ -1977,7 +1989,7 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm, uint32_t pred_desc)
>                  h = m[2 * i + 1];
>                  l = compress_bits(l >> odd, esz);
>                  h = compress_bits(h >> odd, esz);
> -                d[oprsz_16 + i] = l + (h << 32);
> +                d[oprsz_16 + i] = l | (h << 32);
>              }
>          }
>      }

thanks
-- PMM


  reply	other threads:[~2020-08-25 13:44 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-15  1:31 [PATCH 00/20] target/arm: SVE2 preparatory patches Richard Henderson
2020-08-15  1:31 ` [PATCH 01/20] qemu/int128: Add int128_lshift Richard Henderson
2020-08-24 16:40   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 02/20] target/arm: Split out gen_gvec_fn_zz Richard Henderson
2020-08-24 16:40   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 03/20] target/arm: Split out gen_gvec_fn_zzz, do_zzz_fn Richard Henderson
2020-08-24 16:40   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 04/20] target/arm: Rearrange {sve,fp}_check_access assert Richard Henderson
2020-08-24 16:59   ` Peter Maydell
2020-08-25 13:47     ` Richard Henderson
2020-08-15  1:31 ` [PATCH 05/20] target/arm: Merge do_vector2_p into do_mov_p Richard Henderson
2020-08-24 16:41   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 06/20] target/arm: Clean up 4-operand predicate expansion Richard Henderson
2020-08-25 11:13   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 07/20] target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_pppp Richard Henderson
2020-08-24 16:44   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 08/20] target/arm: Split out gen_gvec_ool_zzzp Richard Henderson
2020-08-24 16:43   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 09/20] target/arm: Merge helper_sve_clr_* and helper_sve_movz_* Richard Henderson
2020-08-25 11:16   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 10/20] target/arm: Split out gen_gvec_ool_zzp Richard Henderson
2020-08-24 16:46   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 11/20] target/arm: Split out gen_gvec_ool_zzz Richard Henderson
2020-08-24 16:47   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 12/20] target/arm: Split out gen_gvec_ool_zz Richard Henderson
2020-08-24 16:47   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 13/20] target/arm: Tidy SVE tszimm shift formats Richard Henderson
2020-08-25 11:18   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 14/20] target/arm: Generalize inl_qrdmlah_* helper functions Richard Henderson
2020-08-25 13:06   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 15/20] target/arm: Fix sve_uzp_p vs odd vector lengths Richard Henderson
2020-08-25 13:43   ` Peter Maydell [this message]
2020-08-25 14:02     ` Richard Henderson
2020-08-25 14:09       ` Peter Maydell
2020-08-15  1:31 ` [PATCH 16/20] target/arm: Fix sve_zip_p " Richard Henderson
2020-08-25 13:49   ` Peter Maydell
2020-08-28 19:26     ` Richard Henderson
2020-08-28 23:01       ` Peter Maydell
2020-08-15  1:31 ` [PATCH 17/20] target/arm: Fix sve_punpk_p " Richard Henderson
2020-08-25 13:53   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 18/20] target/arm: Convert integer multiply (indexed) to gvec for aa64 advsimd Richard Henderson
2020-08-25 13:54   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 19/20] target/arm: Convert integer multiply-add " Richard Henderson
2020-08-25 13:55   ` Peter Maydell
2020-08-15  1:31 ` [PATCH 20/20] target/arm: Convert sq{, r}dmulh " Richard Henderson
2020-08-25 13:57   ` Peter Maydell
2020-08-15 17:55 ` [PATCH 00/20] target/arm: SVE2 preparatory patches no-reply
2020-08-27 18:28 ` Peter Maydell
2020-08-27 21:12   ` Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAFEAcA9KPLqMkzT1ckdQPniJJ9y180YncJxfJ3W4TC_tvq9csg@mail.gmail.com \
    --to=peter.maydell@linaro.org \
    --cc=laurent.desnogues@gmail.com \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).