From: Eric Blake <eblake@redhat.com> To: Stafford Horne <shorne@gmail.com> Cc: "Peter Maydell" <peter.maydell@linaro.org>, "Thomas Huth" <thuth@redhat.com>, "Jia Liu" <proljc@gmail.com>, qemu-trivial@nongnu.org, "Philippe Mathieu-Daudé" <philmd@redhat.com>, qemu-devel@nongnu.org, "Markus Armbruster" <armbru@redhat.com>, 1874073@bugs.launchpad.net, "Christophe de Dinechin" <dinechin@redhat.com>, "Martin Liška" <mliska@suse.cz> Subject: Re: [PATCH] hw/openrisc/openrisc_sim: Add assertion to silent GCC warning Date: Tue, 9 Jun 2020 15:49:55 -0500 [thread overview] Message-ID: <ddb9102f-19c1-fc48-8c94-608bcca86be9@redhat.com> (raw) In-Reply-To: <20200609204227.GI75760@lianli.shorne-pla.net> On 6/9/20 3:42 PM, Stafford Horne wrote: >>> While humans can tell smp_cpus will always be in the [1, 2] range, >>> (openrisc_sim_machine_init sets mc->max_cpus = 2), the compiler >>> can't. >>> >>> Add an assertion to give the compiler a hint there's no use of >>> uninitialized data. >>> > Acked-by: Stafford Horne <shorne@gmail.com> > > I see there are now two patches for this, I kind of like this assert fix. > > Shall I queue it for OpenRISC pulling? Or can someone else pick this up? Looks like Laurent already volunteered to queue it through the trivial patches tree. -- Eric Blake, Principal Software Engineer Red Hat, Inc. +1-919-301-3226 Virtualization: qemu.org | libvirt.org
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From: Eric Blake <1874073@bugs.launchpad.net> To: qemu-devel@nongnu.org Subject: [Bug 1874073] Re: [PATCH] hw/openrisc/openrisc_sim: Add assertion to silent GCC warning Date: Tue, 09 Jun 2020 20:49:55 -0000 [thread overview] Message-ID: <ddb9102f-19c1-fc48-8c94-608bcca86be9@redhat.com> (raw) Message-ID: <20200609204955.g7Fo0HBlHFM9juZwzdIz8G3dfFh_3lhw7h2dAdLZVE0@z> (raw) In-Reply-To: 158747496330.1952.6391008472811579405.malonedeb@chaenomeles.canonical.com On 6/9/20 3:42 PM, Stafford Horne wrote: >>> While humans can tell smp_cpus will always be in the [1, 2] range, >>> (openrisc_sim_machine_init sets mc->max_cpus = 2), the compiler >>> can't. >>> >>> Add an assertion to give the compiler a hint there's no use of >>> uninitialized data. >>> > Acked-by: Stafford Horne <shorne@gmail.com> > > I see there are now two patches for this, I kind of like this assert fix. > > Shall I queue it for OpenRISC pulling? Or can someone else pick this up? Looks like Laurent already volunteered to queue it through the trivial patches tree. -- Eric Blake, Principal Software Engineer Red Hat, Inc. +1-919-301-3226 Virtualization: qemu.org | libvirt.org -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1874073 Title: openrisc_sim.c:87:42: error: 'cpu_irqs[0]' may be used uninitialized in this function [-Werror=maybe-uninitialized] Status in QEMU: Confirmed Bug description: I see the warning since gcc10: static void openrisc_sim_init(MachineState *machine): ... qemu_irq *cpu_irqs[2]; ... serial_mm_init(get_system_memory(), 0x90000000, 0, serial_irq, 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN); I would initialize cpu_irqs[2] with {}. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1874073/+subscriptions
next prev parent reply other threads:[~2020-06-09 20:52 UTC|newest] Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-21 13:16 [Bug 1874073] [NEW] openrisc_sim.c:87:42: error: 'cpu_irqs[0]' may be used uninitialized in this function [-Werror=maybe-uninitialized] Martin Liska 2020-04-21 13:25 ` [Bug 1874073] " Martin Liska 2020-04-21 13:37 ` Peter Maydell 2020-04-21 14:08 ` Martin Liska 2020-04-21 14:36 ` Peter Maydell 2020-04-21 15:08 ` Philippe Mathieu-Daudé 2020-05-27 7:54 ` Martin Liska 2020-06-08 6:25 ` Philippe Mathieu-Daudé 2020-06-08 7:14 ` [PATCH] hw/openrisc/openrisc_sim: Add assertion to silent GCC warning Philippe Mathieu-Daudé 2020-06-08 7:14 ` [Bug 1874073] " Philippe Mathieu-Daudé 2020-06-08 7:16 ` Thomas Huth 2020-06-08 15:33 ` Eric Blake 2020-06-08 15:33 ` [Bug 1874073] " Eric Blake 2020-06-09 20:42 ` Stafford Horne 2020-06-09 20:49 ` Stafford Horne 2020-06-09 20:49 ` Eric Blake [this message] 2020-06-09 20:49 ` [Bug 1874073] " Eric Blake 2020-06-08 16:06 ` [PATCH v2] hw/openrisc/openrisc_sim: Add assertion to silence " Philippe Mathieu-Daudé 2020-06-08 16:06 ` [Bug 1874073] " Philippe Mathieu-Daudé 2020-06-08 19:42 ` Richard Henderson 2020-06-09 17:44 ` [Bug 1874073] " Laurent Vivier 2020-06-09 17:44 ` Laurent Vivier 2020-07-02 8:50 ` [Bug 1874073] Re: openrisc_sim.c:87:42: error: 'cpu_irqs[0]' may be used uninitialized in this function [-Werror=maybe-uninitialized] Philippe Mathieu-Daudé 2020-08-20 14:39 ` Thomas Huth 2020-05-26 18:51 [PATCH] or1k: Fix compilation hiccup Eric Blake 2020-05-26 23:21 ` no-reply 2020-05-27 2:58 ` Eric Blake 2020-05-27 5:29 ` Thomas Huth 2020-05-27 7:27 ` Philippe Mathieu-Daudé 2020-05-27 7:27 ` [Bug 1874073] " Philippe Mathieu-Daudé 2020-05-29 16:21 ` Christophe de Dinechin 2020-05-29 16:40 ` Peter Maydell 2020-06-02 7:43 ` Markus Armbruster 2020-06-08 6:03 ` Markus Armbruster 2020-06-08 6:22 ` Philippe Mathieu-Daudé 2020-06-08 9:15 ` Markus Armbruster 2020-06-08 15:43 ` Eric Blake
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