All of lore.kernel.org
 help / color / mirror / Atom feed
From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 15/18] drm/i915: set the correct eDP aux channel clock divider on DDI
Date: Tue, 23 Oct 2012 18:30:05 -0200	[thread overview]
Message-ID: <1351024208-3489-16-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1351024208-3489-1-git-send-email-przanoni@gmail.com>

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

The cdclk frequency is not always the same, so the value here should
be adjusted to match it.

Version 2: call intel_ddi_get_cdclk_freq instead of reading
CDCLK_FREQ, because the register is just for earlier HW steppings.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 2 +-
 drivers/gpu/drm/i915/intel_dp.c  | 4 +++-
 drivers/gpu/drm/i915/intel_drv.h | 1 +
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 106c375..30b0db7 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1239,7 +1239,7 @@ void intel_disable_ddi(struct intel_encoder *encoder)
 	/* This will be needed in the future, so leave it here for now */
 }
 
-static int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
+int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
 {
 	if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT)
 		return 450;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f15ea22..6d30b2d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -370,7 +370,9 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 	 * clock divider.
 	 */
 	if (is_cpu_edp(intel_dp)) {
-		if (IS_VALLEYVIEW(dev))
+		if (IS_HASWELL(dev))
+			aux_clock_divider = intel_ddi_get_cdclk_freq(dev_priv) >> 1;
+		else if (IS_VALLEYVIEW(dev))
 			aux_clock_divider = 100;
 		else if (IS_GEN6(dev) || IS_GEN7(dev))
 			aux_clock_divider = 200; /* SNB & IVB eDP input clock at 400Mhz */
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 65927d9..c05e892 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -609,6 +609,7 @@ extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
 extern void intel_ddi_mode_set(struct drm_encoder *encoder,
 				struct drm_display_mode *mode,
 				struct drm_display_mode *adjusted_mode);
+extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
 extern void intel_ddi_pll_init(struct drm_device *dev);
 extern void intel_ddi_enable_pipe_func(struct drm_crtc *crtc);
 extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
-- 
1.7.11.4

  parent reply	other threads:[~2012-10-23 20:30 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-23 20:29 [PATCH 00/18] Haswell eDP enablement v3 Paulo Zanoni
2012-10-23 20:29 ` [PATCH 01/18] drm/i915: fork a Haswell version of ironlake_crtc_{enable, disable} Paulo Zanoni
2012-10-24 13:15   ` Rodrigo Vivi
2012-10-25 11:03   ` Jani Nikula
2012-10-23 20:29 ` [PATCH 02/18] drm/i915: fix the checks inside Ironlake/Haswell crtc enable/disable Paulo Zanoni
2012-10-24 13:18   ` Rodrigo Vivi
2012-10-24 13:31   ` Paulo Zanoni
2012-10-23 20:29 ` [PATCH 03/18] drm/i915: simplify intel_crtc_driving_pch Paulo Zanoni
2012-10-25 11:13   ` Jani Nikula
2012-10-25 12:04     ` Paulo Zanoni
2012-10-25 12:37   ` Paulo Zanoni
2012-10-23 20:29 ` [PATCH 04/18] drm/i915: don't call Haswell PCH code when we can't or don't need Paulo Zanoni
2012-10-25 12:18   ` Jani Nikula
2012-10-23 20:29 ` [PATCH 05/18] drm/i915: add TRANSCODER_EDP Paulo Zanoni
2012-10-24 14:50   ` Lespiau, Damien
2012-10-24 16:33     ` Paulo Zanoni
2012-10-24 16:43       ` Daniel Vetter
2012-10-24 17:59   ` Paulo Zanoni
2012-10-25 10:23     ` Lespiau, Damien
2012-10-23 20:29 ` [PATCH 06/18] drm/i915: convert PIPE_CLK_SEL to transcoder Paulo Zanoni
2012-10-24 14:55   ` Lespiau, Damien
2012-10-23 20:29 ` [PATCH 07/18] drm/i915: convert DDI_FUNC_CTL " Paulo Zanoni
2012-10-24 15:12   ` Lespiau, Damien
2012-10-24 15:30   ` Lespiau, Damien
2012-10-24 16:44     ` Paulo Zanoni
2012-10-24 18:06   ` Paulo Zanoni
2012-10-25 10:24     ` Lespiau, Damien
2012-10-23 20:29 ` [PATCH 08/18] drm/i915: check TRANSCODER_EDP on intel_modeset_setup_hw_state Paulo Zanoni
2012-10-24 12:38   ` Daniel Vetter
2012-10-24 15:45     ` Lespiau, Damien
2012-10-24 15:50       ` Daniel Vetter
2012-10-24 18:09   ` Paulo Zanoni
2012-10-25 10:26     ` Lespiau, Damien
2012-10-23 20:29 ` [PATCH 09/18] drm/i915: convert PIPECONF to use transcoder instead of pipe Paulo Zanoni
2012-10-25 11:12   ` Lespiau, Damien
2012-10-23 20:30 ` [PATCH 10/18] drm/i915: convert PIPE_MSA_MISC to transcoder Paulo Zanoni
2012-10-25 11:09   ` Lespiau, Damien
2012-10-23 20:30 ` [PATCH 11/18] drm/i915: convert CPU M/N timings " Paulo Zanoni
2012-10-25 11:10   ` Lespiau, Damien
2012-10-23 20:30 ` [PATCH 12/18] drm/i915: convert pipe timing definitions " Paulo Zanoni
2012-10-25 11:12   ` Lespiau, Damien
2012-10-23 20:30 ` [PATCH 13/18] drm/i915: implement workaround for VTOTAL when using TRANSCODER_EDP Paulo Zanoni
2012-10-23 20:44   ` Daniel Vetter
2012-10-24 13:34   ` Paulo Zanoni
2012-10-24 15:24     ` Rodrigo Vivi
2012-10-23 20:30 ` [PATCH 14/18] drm/i915: select the correct pipe " Paulo Zanoni
2012-10-24 13:58   ` Rodrigo Vivi
2012-10-23 20:30 ` Paulo Zanoni [this message]
2012-10-24 14:07   ` [PATCH 15/18] drm/i915: set the correct eDP aux channel clock divider on DDI Rodrigo Vivi
2012-10-23 20:30 ` [PATCH 16/18] drm/i915: set/unset the DDI eDP backlight Paulo Zanoni
2012-10-24 14:11   ` Rodrigo Vivi
2012-10-24 14:22   ` Daniel Vetter
2012-10-24 14:43     ` Paulo Zanoni
2012-10-23 20:30 ` [PATCH 17/18] drm/i915: turn the eDP DDI panel on/off Paulo Zanoni
2012-10-24 15:20   ` Rodrigo Vivi
2012-10-23 20:30 ` [PATCH 18/18] drm/i915: enable DDI eDP Paulo Zanoni
2012-10-24 14:24   ` Rodrigo Vivi
2012-10-25 20:17     ` Daniel Vetter
2012-10-24 13:31 ` [PATCH 02-1/18] drm/i915: fix checks inside ironlake_crtc_{enable, disable} Paulo Zanoni
2012-10-24 13:32   ` [PATCH 02-2/18] drm/i915: fix checks inside haswell_crtc_{enable, disable} Paulo Zanoni
2012-10-25 11:07     ` Jani Nikula
2012-10-25 11:04   ` [PATCH 02-1/18] drm/i915: fix checks inside ironlake_crtc_{enable, disable} Jani Nikula

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1351024208-3489-16-git-send-email-przanoni@gmail.com \
    --to=przanoni@gmail.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=paulo.r.zanoni@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.