From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 3/4] drm/i915: HSW PM - removing pcode read/write
Date: Mon, 25 Mar 2013 17:55:51 -0300 [thread overview]
Message-ID: <1364244952-25996-4-git-send-email-rodrigo.vivi@gmail.com> (raw)
In-Reply-To: <1364244952-25996-1-git-send-email-rodrigo.vivi@gmail.com>
Yet according to pm spec pcode read/write operations aren't necessary for HSW.
CC: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/intel_pm.c | 50 ++++++++++++++++++++++-------------------
1 file changed, 27 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index aea5fac..f6a7366 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2645,18 +2645,20 @@ static void gen6_enable_rps(struct drm_device *dev)
GEN6_RP_UP_BUSY_AVG |
(IS_HASWELL(dev) ? GEN7_RP_DOWN_IDLE_AVG : GEN6_RP_DOWN_IDLE_CONT));
- ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0);
- if (!ret && (IS_GEN6(dev) || IS_IVYBRIDGE(dev))) {
- pcu_mbox = 0;
- ret = sandybridge_pcode_read(dev_priv, GEN6_READ_OC_PARAMS, &pcu_mbox);
- if (!ret && (pcu_mbox & (1<<31))) { /* OC supported */
- DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max from %dMHz to %dMHz\n",
- (dev_priv->rps.max_delay & 0xff) * 50,
- (pcu_mbox & 0xff) * 50);
- dev_priv->rps.max_delay = pcu_mbox & 0xff;
+ if (!IS_HASWELL(dev)) {
+ ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0);
+ if (!ret && (IS_GEN6(dev) || IS_IVYBRIDGE(dev))) {
+ pcu_mbox = 0;
+ ret = sandybridge_pcode_read(dev_priv, GEN6_READ_OC_PARAMS, &pcu_mbox);
+ if (!ret && (pcu_mbox & (1<<31))) { /* OC supported */
+ DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max from %dMHz to %dMHz\n",
+ (dev_priv->rps.max_delay & 0xff) * 50,
+ (pcu_mbox & 0xff) * 50);
+ dev_priv->rps.max_delay = pcu_mbox & 0xff;
+ }
+ } else {
+ DRM_DEBUG_DRIVER("Failed to set the min frequency\n");
}
- } else {
- DRM_DEBUG_DRIVER("Failed to set the min frequency\n");
}
gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
@@ -2670,18 +2672,20 @@ static void gen6_enable_rps(struct drm_device *dev)
/* enable all PM interrupts */
I915_WRITE(GEN6_PMINTRMSK, 0);
- rc6vids = 0;
- ret = sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
- if (IS_GEN6(dev) && ret) {
- DRM_DEBUG_DRIVER("Couldn't check for BIOS workaround\n");
- } else if (IS_GEN6(dev) && (GEN6_DECODE_RC6_VID(rc6vids & 0xff) < 450)) {
- DRM_DEBUG_DRIVER("You should update your BIOS. Correcting minimum rc6 voltage (%dmV->%dmV)\n",
- GEN6_DECODE_RC6_VID(rc6vids & 0xff), 450);
- rc6vids &= 0xffff00;
- rc6vids |= GEN6_ENCODE_RC6_VID(450);
- ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_RC6VIDS, rc6vids);
- if (ret)
- DRM_ERROR("Couldn't fix incorrect rc6 voltage\n");
+ if (!IS_HASWELL(dev)) {
+ rc6vids = 0;
+ ret = sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
+ if (IS_GEN6(dev) && ret) {
+ DRM_DEBUG_DRIVER("Couldn't check for BIOS workaround\n");
+ } else if (IS_GEN6(dev) && (GEN6_DECODE_RC6_VID(rc6vids & 0xff) < 450)) {
+ DRM_DEBUG_DRIVER("You should update your BIOS. Correcting minimum rc6 voltage (%dmV->%dmV)\n",
+ GEN6_DECODE_RC6_VID(rc6vids & 0xff), 450);
+ rc6vids &= 0xffff00;
+ rc6vids |= GEN6_ENCODE_RC6_VID(450);
+ ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_RC6VIDS, rc6vids);
+ if (ret)
+ DRM_ERROR("Couldn't fix incorrect rc6 voltage\n");
+ }
}
gen6_gt_force_wake_put(dev_priv);
--
1.8.1.4
next prev parent reply other threads:[~2013-03-25 20:56 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-25 20:55 [PATCH 0/4] HSW PM - RC6 fixes, clean up and split Rodrigo Vivi
2013-03-25 20:55 ` [PATCH 1/4] drm/i915: HSW PM Frequency bits fix Rodrigo Vivi
2013-03-25 22:15 ` Ben Widawsky
2013-03-26 8:04 ` Daniel Vetter
2013-03-25 20:55 ` [PATCH 2/4] drm/i915: HSW PM Cleaning - Removing unecessary register/bits set Rodrigo Vivi
2013-03-25 20:55 ` Rodrigo Vivi [this message]
2013-03-26 8:02 ` [PATCH 3/4] drm/i915: HSW PM - removing pcode read/write Daniel Vetter
2013-03-26 16:30 ` Rodrigo Vivi
2013-03-25 20:55 ` [PATCH 4/4] drm/i915: creating Haswell rc6 function Rodrigo Vivi
2013-03-26 8:05 ` Daniel Vetter
2013-03-26 13:54 ` Rodrigo Vivi
2013-03-26 16:25 ` Rodrigo Vivi
2013-03-26 16:30 ` Daniel Vetter
2013-03-26 16:32 ` Rodrigo Vivi
2013-03-26 19:00 ` Daniel Vetter
2013-03-26 19:32 ` Rodrigo Vivi
2013-03-26 19:37 ` Rodrigo Vivi
2013-03-26 19:49 ` Daniel Vetter
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