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From: Like Xu <like.xu@linux.intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	ak@linux.intel.com, wei.w.wang@intel.com,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	Like Xu <like.xu@linux.intel.com>
Subject: [PATCH v12 09/11] KVM: vmx/pmu: Emulate legacy freezing LBRs on virtual PMI
Date: Sat, 13 Jun 2020 16:09:54 +0800	[thread overview]
Message-ID: <20200613080958.132489-10-like.xu@linux.intel.com> (raw)
In-Reply-To: <20200613080958.132489-1-like.xu@linux.intel.com>

The current vPMU only supports Architecture Version 2. According to
Intel SDM "17.4.7 Freezing LBR and Performance Counters on PMI", if
IA32_DEBUGCTL.Freeze_LBR_On_PMI = 1, the LBR is frozen on the virtual
PMI and the KVM would emulate to clear the LBR bit (bit 0) in
IA32_DEBUGCTL. Also guest needs to re-enable IA32_DEBUGCTL.LBR
to resume recording branches.

Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
 arch/x86/kvm/pmu.c           |  5 ++++-
 arch/x86/kvm/pmu.h           |  1 +
 arch/x86/kvm/vmx/pmu_intel.c | 31 +++++++++++++++++++++++++++++++
 3 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index b86346903f2e..5053f4238218 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -378,8 +378,11 @@ int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *data)
 
 void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu)
 {
-	if (lapic_in_kernel(vcpu))
+	if (lapic_in_kernel(vcpu)) {
+		if (kvm_x86_ops.pmu_ops->deliver_pmi)
+			kvm_x86_ops.pmu_ops->deliver_pmi(vcpu);
 		kvm_apic_local_deliver(vcpu->arch.apic, APIC_LVTPC);
+	}
 }
 
 bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)
diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h
index ab85eed8a6cc..095b84392b89 100644
--- a/arch/x86/kvm/pmu.h
+++ b/arch/x86/kvm/pmu.h
@@ -37,6 +37,7 @@ struct kvm_pmu_ops {
 	void (*refresh)(struct kvm_vcpu *vcpu);
 	void (*init)(struct kvm_vcpu *vcpu);
 	void (*reset)(struct kvm_vcpu *vcpu);
+	void (*deliver_pmi)(struct kvm_vcpu *vcpu);
 };
 
 static inline u64 pmc_bitmask(struct kvm_pmc *pmc)
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index a78c440ebff2..85a675004cbb 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -641,6 +641,36 @@ static void intel_pmu_reset(struct kvm_vcpu *vcpu)
 	intel_pmu_free_lbr_event(vcpu);
 }
 
+/*
+ * Emulate LBR_On_PMI behavior for 1 < pmu.version < 4.
+ *
+ * If Freeze_LBR_On_PMI = 1, the LBR is frozen on PMI and
+ * the KVM emulates to clear the LBR bit (bit 0) in IA32_DEBUGCTL.
+ *
+ * Guest needs to re-enable LBR to resume branches recording.
+ */
+static void intel_pmu_legacy_freezing_lbrs_on_pmi(struct kvm_vcpu *vcpu)
+{
+	u64 data;
+
+	data = vmcs_read64(GUEST_IA32_DEBUGCTL);
+	if (data & DEBUGCTLMSR_FREEZE_LBRS_ON_PMI) {
+		data &= ~DEBUGCTLMSR_LBR;
+		vmcs_write64(GUEST_IA32_DEBUGCTL, data);
+	}
+}
+
+static void intel_pmu_deliver_pmi(struct kvm_vcpu *vcpu)
+{
+	u8 version = vcpu_to_pmu(vcpu)->version;
+
+	if (!lbr_is_enabled(vcpu))
+		return;
+
+	if (version > 1 && version < 4)
+		intel_pmu_legacy_freezing_lbrs_on_pmi(vcpu);
+}
+
 struct kvm_pmu_ops intel_pmu_ops = {
 	.find_arch_event = intel_find_arch_event,
 	.find_fixed_event = intel_find_fixed_event,
@@ -655,4 +685,5 @@ struct kvm_pmu_ops intel_pmu_ops = {
 	.refresh = intel_pmu_refresh,
 	.init = intel_pmu_init,
 	.reset = intel_pmu_reset,
+	.deliver_pmi = intel_pmu_deliver_pmi,
 };
-- 
2.21.3


  parent reply	other threads:[~2020-06-13  8:12 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-13  8:09 [PATCH v12 00/11] Guest Last Branch Recording Enabling Like Xu
2020-06-13  8:09 ` [PATCH v12 01/11] perf/x86: Fix variable types for LBR registers Like Xu
2020-07-03  8:01   ` [tip: perf/core] " tip-bot2 for Wei Wang
2020-11-09  6:34   ` [PATCH v12 01/11] " Andi Kleen
2020-11-11  2:14     ` Xu, Like
2020-06-13  8:09 ` [PATCH v12 02/11] perf/x86/core: Refactor hw->idx checks and cleanup Like Xu
2020-07-03  8:01   ` [tip: perf/core] " tip-bot2 for Like Xu
2020-06-13  8:09 ` [PATCH v12 03/11] perf/x86/lbr: Add interface to get LBR information Like Xu
2020-07-03  8:01   ` [tip: perf/core] " tip-bot2 for Like Xu
2020-06-13  8:09 ` [PATCH v12 04/11] perf/x86: Add constraint to create guest LBR event without hw counter Like Xu
2020-06-13  8:09 ` [PATCH v12 05/11] perf/x86: Keep LBR records unchanged in host context for guest usage Like Xu
2020-06-13  8:09 ` [PATCH v12 06/11] KVM: vmx/pmu: Expose LBR to guest via MSR_IA32_PERF_CAPABILITIES Like Xu
2020-07-08 13:36   ` Andi Kleen
2020-07-08 14:38     ` Xu, Like
2020-06-13  8:09 ` [PATCH v12 07/11] KVM: vmx/pmu: Unmask LBR fields in the MSR_IA32_DEBUGCTLMSR emualtion Like Xu
2020-06-13  9:14   ` Xiaoyao Li
2020-06-13  9:42     ` Xu, Like
2020-07-07 20:21       ` Sean Christopherson
2020-07-08  1:37         ` Xiaoyao Li
2020-07-08  7:06         ` Xu, Like
2020-07-10 16:28           ` Sean Christopherson
2020-06-13  8:09 ` [PATCH v12 08/11] KVM: vmx/pmu: Pass-through LBR msrs when guest LBR event is scheduled Like Xu
2020-06-13  8:09 ` Like Xu [this message]
2020-06-13  8:09 ` [PATCH v12 10/11] KVM: vmx/pmu: Reduce the overhead of LBR pass-through or cancellation Like Xu
2020-06-13  8:09 ` [PATCH v12 11/11] KVM: vmx/pmu: Release guest LBR event via lazy release mechanism Like Xu
2020-06-13  8:09 ` [Qemu-devel] [PATCH 1/2] target/i386: define a new MSR based feature word - FEAT_PERF_CAPABILITIES Like Xu
2020-06-13  8:09   ` Like Xu
2020-06-13  8:09 ` [Qemu-devel] [PATCH 2/2] target/i386: add -cpu,lbr=true support to enable guest LBR Like Xu
2020-06-13  8:09   ` [Qemu-devel] [PATCH 2/2] target/i386: add -cpu, lbr=true " Like Xu
2020-06-23 13:13 ` [PATCH v12 00/11] Guest Last Branch Recording Enabling Like Xu
2020-07-01  2:38   ` Like Xu
2020-07-02  7:40 ` Peter Zijlstra
2020-07-02 13:11   ` Liang, Kan
2020-07-02 13:58     ` Peter Zijlstra
2020-07-03  7:56       ` Peter Zijlstra
2020-07-03  8:04         ` Xu, Like

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