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From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: linux-arm-msm@vger.kernel.org, andersson@kernel.org,
	agross@kernel.org, krzysztof.kozlowski@linaro.org
Cc: Nathan Chancellor <nathan@kernel.org>,
	Akhil P Oommen <quic_akhilpo@quicinc.com>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	"Joel Fernandes \(Google\)" <joel@joelfernandes.org>,
	Ricardo Ribalda <ribalda@chromium.org>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	marijn.suijten@somainline.org, freedreno@lists.freedesktop.org,
	Sean Paul <sean@poorly.run>
Subject: [PATCH 05/14] drm/msm/adreno: Disable has_cached_coherent for A610/A619_holi
Date: Thu, 26 Jan 2023 16:16:09 +0100	[thread overview]
Message-ID: <20230126151618.225127-6-konrad.dybcio@linaro.org> (raw)
In-Reply-To: <20230126151618.225127-1-konrad.dybcio@linaro.org>

These SKUs don't support the feature. Disable it to make the GPU stop
crashing after almost each and every submission - the received data on
the GPU end was simply incomplete in garbled, resulting in almost nothing
being executed properly.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 drivers/gpu/drm/msm/adreno/adreno_device.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 36f062c7582f..82757f005a1a 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -540,7 +540,13 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
 		config.rev.minor, config.rev.patchid);
 
 	priv->is_a2xx = config.rev.core == 2;
-	priv->has_cached_coherent = config.rev.core >= 6;
+
+	if (config.rev.core >= 6) {
+		/* Exclude A610 and A619_holi */
+		if (!(adreno_cmp_rev(ADRENO_REV(6, 1, 0, ANY_ID), config.rev) ||
+		      adreno_cmp_rev(ADRENO_REV(6, 1, 9, 1), config.rev)))
+			priv->has_cached_coherent = true;
+	}
 
 	gpu = info->init(drm);
 	if (IS_ERR(gpu)) {
-- 
2.39.1


WARNING: multiple messages have this Message-ID (diff)
From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: linux-arm-msm@vger.kernel.org, andersson@kernel.org,
	agross@kernel.org, krzysztof.kozlowski@linaro.org
Cc: marijn.suijten@somainline.org,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Rob Clark <robdclark@gmail.com>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
	Daniel Vetter <daniel@ffwll.ch>,
	Akhil P Oommen <quic_akhilpo@quicinc.com>,
	Ricardo Ribalda <ribalda@chromium.org>,
	Chia-I Wu <olvaffe@gmail.com>,
	Nathan Chancellor <nathan@kernel.org>,
	"Joel Fernandes (Google)" <joel@joelfernandes.org>,
	dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 05/14] drm/msm/adreno: Disable has_cached_coherent for A610/A619_holi
Date: Thu, 26 Jan 2023 16:16:09 +0100	[thread overview]
Message-ID: <20230126151618.225127-6-konrad.dybcio@linaro.org> (raw)
In-Reply-To: <20230126151618.225127-1-konrad.dybcio@linaro.org>

These SKUs don't support the feature. Disable it to make the GPU stop
crashing after almost each and every submission - the received data on
the GPU end was simply incomplete in garbled, resulting in almost nothing
being executed properly.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 drivers/gpu/drm/msm/adreno/adreno_device.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 36f062c7582f..82757f005a1a 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -540,7 +540,13 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
 		config.rev.minor, config.rev.patchid);
 
 	priv->is_a2xx = config.rev.core == 2;
-	priv->has_cached_coherent = config.rev.core >= 6;
+
+	if (config.rev.core >= 6) {
+		/* Exclude A610 and A619_holi */
+		if (!(adreno_cmp_rev(ADRENO_REV(6, 1, 0, ANY_ID), config.rev) ||
+		      adreno_cmp_rev(ADRENO_REV(6, 1, 9, 1), config.rev)))
+			priv->has_cached_coherent = true;
+	}
 
 	gpu = info->init(drm);
 	if (IS_ERR(gpu)) {
-- 
2.39.1


  parent reply	other threads:[~2023-01-26 15:17 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-26 15:16 [PATCH 00/14] GMU-less A6xx support (A610, A619_holi) Konrad Dybcio
2023-01-26 15:16 ` [PATCH 01/14] drm/msm/a6xx: De-staticize sptprac en/disable functions Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 02/14] drm/msm/a6xx: Extend UBWC config Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-02-01  9:30   ` Akhil P Oommen
2023-02-01  9:30     ` Akhil P Oommen
2023-02-01 10:51     ` Konrad Dybcio
2023-02-01 10:51       ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 03/14] drm/msm/a6xx: Introduce GMU wrapper support Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 04/14] drm/msm/a6xx: Remove both GBIF and RBBM GBIF halt on hw init Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-01-26 15:16 ` Konrad Dybcio [this message]
2023-01-26 15:16   ` [PATCH 05/14] drm/msm/adreno: Disable has_cached_coherent for A610/A619_holi Konrad Dybcio
2023-01-26 15:16 ` [PATCH 06/14] drm/msm/gpu: Use dev_pm_opp_set_rate for non-GMU GPUs Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-02-06 18:30   ` Konrad Dybcio
2023-02-06 18:30     ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 07/14] drm/msm/a6xx: Add support for A619_holi Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 08/14] drm/msm/a6xx: Add A610 support Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 09/14] drm/msm/a6xx: Fix some A619 tunables Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-02-08 18:21   ` [Freedreno] " Jordan Crouse
2023-02-08 18:21     ` Jordan Crouse
2023-02-14 11:25     ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 10/14] drm/msm/a6xx: Fix up A6XX protected registers Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 11/14] drm/msm/a6xx: Enable optional icc voting from OPP tables Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 12/14] drm/msm/a6xx: Use "else if" in GPU speedbin rev matching Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 13/14] drm/msm/a6xx: Add A619_holi speedbin support Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio
2023-01-27 14:19   ` Dmitry Baryshkov
2023-01-27 14:19     ` Dmitry Baryshkov
2023-01-27 14:20     ` Konrad Dybcio
2023-01-27 14:20       ` Konrad Dybcio
2023-01-27 14:22     ` Konrad Dybcio
2023-01-27 14:22       ` Konrad Dybcio
2023-01-26 15:16 ` [PATCH 14/14] drm/msm/a6xx: Add A610 " Konrad Dybcio
2023-01-26 15:16   ` Konrad Dybcio

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