* [PATCH 0/3] add some imx8m power and clock control
@ 2021-12-17 15:20 Angus Ainslie
2021-12-17 15:20 ` [PATCH 1/3] imx8m: clock_imx8mq: Add the ecspi clocks Angus Ainslie
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: Angus Ainslie @ 2021-12-17 15:20 UTC (permalink / raw)
To: u-boot, NXP i.MX U-Boot Team
Cc: Stefano Babic, Fabio Estevam, Peng Fan, Angus Ainslie,
Marek Vasut, Ye Li, Alice Guo, Patrick Wildt, Simon Glass,
Frieder Schrempf, Marek Behún, Ying-Chun Liu (PaulLiu),
kernel
Enable some imx8m subsystems used when booting the librem5 phone
Angus Ainslie (3):
imx8m: clock_imx8mq: Add the ecspi clocks
arch: imx8m: imx-regs.h add the USB regs
arch: imx8m: Add USB power control
arch/arm/include/asm/arch-imx8m/imx-regs.h | 14 +++++
arch/arm/include/asm/arch-imx8m/sys_proto.h | 1 +
arch/arm/mach-imx/imx8m/clock_imx8mq.c | 38 ++++++++++++++
arch/arm/mach-imx/imx8m/soc.c | 57 +++++++++++++++++++++
4 files changed, 110 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/3] imx8m: clock_imx8mq: Add the ecspi clocks
2021-12-17 15:20 [PATCH 0/3] add some imx8m power and clock control Angus Ainslie
@ 2021-12-17 15:20 ` Angus Ainslie
2021-12-17 15:20 ` [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs Angus Ainslie
2021-12-17 15:20 ` [PATCH 3/3] arch: imx8m: Add USB power control Angus Ainslie
2 siblings, 0 replies; 9+ messages in thread
From: Angus Ainslie @ 2021-12-17 15:20 UTC (permalink / raw)
To: u-boot, NXP i.MX U-Boot Team
Cc: Stefano Babic, Fabio Estevam, Peng Fan, Angus Ainslie,
Marek Vasut, Ye Li, Alice Guo, Patrick Wildt, Simon Glass,
Frieder Schrempf, Marek Behún, Ying-Chun Liu (PaulLiu),
kernel
Enable the clocks for spi buses 1 through 3
Signed-off-by: Angus Ainslie <angus@akkea.ca>
---
arch/arm/include/asm/arch-imx8m/imx-regs.h | 9 +++++
arch/arm/mach-imx/imx8m/clock_imx8mq.c | 38 ++++++++++++++++++++++
2 files changed, 47 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index b800da13a1..8cb499d3a3 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -94,6 +94,15 @@
#define SRC_DDR1_RCR_CORE_RESET_N_MASK BIT(1)
#define SRC_DDR1_RCR_PRESET_N_MASK BIT(0)
+#define IMX_CSPI1_BASE 0x30820000
+#define IMX_CSPI2_BASE 0x30830000
+#define IMX_CSPI3_BASE 0x30840000
+
+#define MXC_SPI_BASE_ADDRESSES \
+ IMX_CSPI1_BASE, \
+ IMX_CSPI2_BASE, \
+ IMX_CSPI3_BASE
+
struct iomuxc_gpr_base_regs {
u32 gpr[47];
};
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
index 60e2218a3c..834a7bfa01 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
@@ -505,6 +505,31 @@ int set_clk_qspi(void)
return 0;
}
+int set_clk_ecspi(int sel)
+{
+ int clk = ECSPI1_CLK_ROOT;
+
+ switch (sel) {
+ case 1:
+ clk = ECSPI1_CLK_ROOT;
+ break;
+ case 2:
+ clk = ECSPI2_CLK_ROOT;
+ break;
+ case 3:
+ clk = ECSPI3_CLK_ROOT;
+ break;
+ }
+
+ clock_enable(clk, 0);
+ /*
+ * TODO: configure clock
+ */
+ clock_enable(clk, 1);
+
+ return 0;
+}
+
#ifdef CONFIG_FEC_MXC
int set_clk_enet(enum enet_freq type)
{
@@ -772,6 +797,19 @@ int clock_init(void)
clock_enable(CCGR_TSENSOR, 1);
clock_enable(CCGR_OCOTP, 1);
+ /*
+ * set ecspi roots
+ */
+ clock_enable(CCGR_ECSPI1, 0);
+ clock_enable(CCGR_ECSPI2, 0);
+ clock_enable(CCGR_ECSPI3, 0);
+ clock_set_target_val(ECSPI1_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0));
+ clock_set_target_val(ECSPI2_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0));
+ clock_set_target_val(ECSPI3_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0));
+ clock_enable(CCGR_ECSPI1, 1);
+ clock_enable(CCGR_ECSPI2, 1);
+ clock_enable(CCGR_ECSPI3, 1);
+
/* config GIC ROOT to sys_pll2_200m */
clock_enable(CCGR_GIC, 0);
clock_set_target_val(GIC_CLK_ROOT,
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs
2021-12-17 15:20 [PATCH 0/3] add some imx8m power and clock control Angus Ainslie
2021-12-17 15:20 ` [PATCH 1/3] imx8m: clock_imx8mq: Add the ecspi clocks Angus Ainslie
@ 2021-12-17 15:20 ` Angus Ainslie
2021-12-17 16:28 ` Fabio Estevam
2021-12-17 15:20 ` [PATCH 3/3] arch: imx8m: Add USB power control Angus Ainslie
2 siblings, 1 reply; 9+ messages in thread
From: Angus Ainslie @ 2021-12-17 15:20 UTC (permalink / raw)
To: u-boot, NXP i.MX U-Boot Team
Cc: Stefano Babic, Fabio Estevam, Peng Fan, Angus Ainslie,
Marek Vasut, Ye Li, Alice Guo, Patrick Wildt, Simon Glass,
Frieder Schrempf, Marek Behún, Ying-Chun Liu (PaulLiu),
kernel
Add the USB regs for SDP mode
Signed-off-by: Angus Ainslie <angus@akkea.ca>
---
arch/arm/include/asm/arch-imx8m/imx-regs.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 8cb499d3a3..bd474f88a6 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -103,6 +103,11 @@
IMX_CSPI2_BASE, \
IMX_CSPI3_BASE
+#define USB1_BASE_ADDR 0x38100000
+#define USB2_BASE_ADDR 0x38200000
+#define USB1_PHY_BASE_ADDR 0x381F0000
+#define USB2_PHY_BASE_ADDR 0x382F0000
+
struct iomuxc_gpr_base_regs {
u32 gpr[47];
};
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/3] arch: imx8m: Add USB power control
2021-12-17 15:20 [PATCH 0/3] add some imx8m power and clock control Angus Ainslie
2021-12-17 15:20 ` [PATCH 1/3] imx8m: clock_imx8mq: Add the ecspi clocks Angus Ainslie
2021-12-17 15:20 ` [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs Angus Ainslie
@ 2021-12-17 15:20 ` Angus Ainslie
2 siblings, 0 replies; 9+ messages in thread
From: Angus Ainslie @ 2021-12-17 15:20 UTC (permalink / raw)
To: u-boot, NXP i.MX U-Boot Team
Cc: Stefano Babic, Fabio Estevam, Peng Fan, Angus Ainslie,
Marek Vasut, Ye Li, Alice Guo, Patrick Wildt, Simon Glass,
Frieder Schrempf, Marek Behún, Ying-Chun Liu (PaulLiu),
kernel
Enable turning on USB power for SDP mode
Signed-off-by: Angus Ainslie <angus@akkea.ca>
---
arch/arm/include/asm/arch-imx8m/sys_proto.h | 1 +
arch/arm/mach-imx/imx8m/soc.c | 57 +++++++++++++++++++++
2 files changed, 58 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8m/sys_proto.h b/arch/arm/include/asm/arch-imx8m/sys_proto.h
index d328542ece..98a958166a 100644
--- a/arch/arm/include/asm/arch-imx8m/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx8m/sys_proto.h
@@ -14,4 +14,5 @@ void restore_boot_params(void);
extern unsigned long rom_pointer[];
enum boot_device get_boot_device(void);
bool is_usb_boot(void);
+int imx8m_usb_power(int usb_id, bool on);
#endif
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 863508776d..a43075e1c6 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -1203,6 +1203,63 @@ int arch_misc_init(void)
}
#endif
+#ifdef CONFIG_SPL_BUILD
+static u32 gpc_pu_m_core_offset[11] = {
+ 0xc00, 0xc40, 0xc80, 0xcc0,
+ 0xdc0, 0xe00, 0xe40, 0xe80,
+ 0xec0, 0xf00, 0xf40,
+};
+
+#define PGC_PCR 0
+
+void imx_gpc_set_m_core_pgc(unsigned int offset, bool pdn)
+{
+ u32 val;
+ uintptr_t reg = GPC_BASE_ADDR + offset;
+
+ val = readl(reg);
+ val &= ~(0x1 << PGC_PCR);
+
+ if (pdn)
+ val |= 0x1 << PGC_PCR;
+ writel(val, reg);
+}
+
+void imx8m_usb_power_domain(u32 domain_id, bool on)
+{
+ u32 val;
+ uintptr_t reg;
+
+ imx_gpc_set_m_core_pgc(gpc_pu_m_core_offset[domain_id], true);
+
+ reg = GPC_BASE_ADDR + (on ? 0xf8 : 0x104);
+ val = 1 << (domain_id > 3 ? (domain_id + 3) : domain_id);
+ writel(val, reg);
+ while (readl(reg) & val)
+ ;
+ imx_gpc_set_m_core_pgc(gpc_pu_m_core_offset[domain_id], false);
+}
+#endif
+
+int imx8m_usb_power(int usb_id, bool on)
+{
+ struct arm_smccc_res res;
+
+ if (usb_id > 1)
+ return -EINVAL;
+
+#ifdef CONFIG_SPL_BUILD
+ imx8m_usb_power_domain(2 + usb_id, on);
+#else
+ arm_smccc_smc(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN,
+ 2 + usb_id, on, 0, 0, 0, 0, &res);
+ if (res.a0)
+ return -EPERM;
+#endif
+
+ return 0;
+}
+
void imx_tmu_arch_init(void *reg_base)
{
if (is_imx8mm() || is_imx8mn()) {
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs
2021-12-17 15:20 ` [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs Angus Ainslie
@ 2021-12-17 16:28 ` Fabio Estevam
2021-12-17 16:34 ` Angus Ainslie
0 siblings, 1 reply; 9+ messages in thread
From: Fabio Estevam @ 2021-12-17 16:28 UTC (permalink / raw)
To: Angus Ainslie
Cc: U-Boot-Denx, NXP i.MX U-Boot Team, Stefano Babic, Peng Fan,
Marek Vasut, Ye Li, Alice Guo, Patrick Wildt, Simon Glass,
Frieder Schrempf, Marek Behún, Ying-Chun Liu (PaulLiu),
kernel
Hi Angus,
On Fri, Dec 17, 2021 at 12:21 PM Angus Ainslie <angus@akkea.ca> wrote:
>
> Add the USB regs for SDP mode
>
> Signed-off-by: Angus Ainslie <angus@akkea.ca>
> ---
> arch/arm/include/asm/arch-imx8m/imx-regs.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
> index 8cb499d3a3..bd474f88a6 100644
> --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
> +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
> @@ -103,6 +103,11 @@
> IMX_CSPI2_BASE, \
> IMX_CSPI3_BASE
>
> +#define USB1_BASE_ADDR 0x38100000
> +#define USB2_BASE_ADDR 0x38200000
> +#define USB1_PHY_BASE_ADDR 0x381F0000
> +#define USB2_PHY_BASE_ADDR 0x382F0000
Some time ago I sent a similar patch and the feedback from Marek was that these
base addresses should be retrieved from the devicetree instead.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs
2021-12-17 16:28 ` Fabio Estevam
@ 2021-12-17 16:34 ` Angus Ainslie
2021-12-17 17:03 ` Adam Ford
0 siblings, 1 reply; 9+ messages in thread
From: Angus Ainslie @ 2021-12-17 16:34 UTC (permalink / raw)
To: Fabio Estevam
Cc: U-Boot-Denx, NXP i.MX U-Boot Team, Stefano Babic, Peng Fan,
Marek Vasut, Ye Li, Alice Guo, Patrick Wildt, Simon Glass,
Frieder Schrempf, Marek Behún, Ying-Chun Liu (PaulLiu),
kernel
Hi Fabio,
On 2021-12-17 08:28, Fabio Estevam wrote:
> Hi Angus,
>
> On Fri, Dec 17, 2021 at 12:21 PM Angus Ainslie <angus@akkea.ca> wrote:
>>
>> Add the USB regs for SDP mode
>>
>> Signed-off-by: Angus Ainslie <angus@akkea.ca>
>> ---
>> arch/arm/include/asm/arch-imx8m/imx-regs.h | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h
>> b/arch/arm/include/asm/arch-imx8m/imx-regs.h
>> index 8cb499d3a3..bd474f88a6 100644
>> --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
>> +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
>> @@ -103,6 +103,11 @@
>> IMX_CSPI2_BASE, \
>> IMX_CSPI3_BASE
>>
>> +#define USB1_BASE_ADDR 0x38100000
>> +#define USB2_BASE_ADDR 0x38200000
>> +#define USB1_PHY_BASE_ADDR 0x381F0000
>> +#define USB2_PHY_BASE_ADDR 0x382F0000
>
> Some time ago I sent a similar patch and the feedback from Marek was
> that these
> base addresses should be retrieved from the devicetree instead.
I had problems getting the dwc3 to initialize properly when using the
device model in the SPL. I'm currently just using this in the SPL and
the device model in u-boot.
I'll take another shot at initializing the dwc3 in the SPL with the DM.
Thanks
Angus
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs
2021-12-17 16:34 ` Angus Ainslie
@ 2021-12-17 17:03 ` Adam Ford
2021-12-17 17:45 ` Fabio Estevam
0 siblings, 1 reply; 9+ messages in thread
From: Adam Ford @ 2021-12-17 17:03 UTC (permalink / raw)
To: Angus Ainslie
Cc: Fabio Estevam, U-Boot-Denx, NXP i.MX U-Boot Team, Stefano Babic,
Peng Fan, Marek Vasut, Ye Li, Alice Guo, Patrick Wildt,
Simon Glass, Frieder Schrempf, Marek Behún,
Ying-Chun Liu (PaulLiu),
kernel
On Fri, Dec 17, 2021 at 10:35 AM Angus Ainslie <angus@akkea.ca> wrote:
>
> Hi Fabio,
>
> On 2021-12-17 08:28, Fabio Estevam wrote:
> > Hi Angus,
> >
> > On Fri, Dec 17, 2021 at 12:21 PM Angus Ainslie <angus@akkea.ca> wrote:
> >>
> >> Add the USB regs for SDP mode
> >>
> >> Signed-off-by: Angus Ainslie <angus@akkea.ca>
> >> ---
> >> arch/arm/include/asm/arch-imx8m/imx-regs.h | 5 +++++
> >> 1 file changed, 5 insertions(+)
> >>
> >> diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h
> >> b/arch/arm/include/asm/arch-imx8m/imx-regs.h
> >> index 8cb499d3a3..bd474f88a6 100644
> >> --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
> >> +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
> >> @@ -103,6 +103,11 @@
> >> IMX_CSPI2_BASE, \
> >> IMX_CSPI3_BASE
> >>
> >> +#define USB1_BASE_ADDR 0x38100000
> >> +#define USB2_BASE_ADDR 0x38200000
> >> +#define USB1_PHY_BASE_ADDR 0x381F0000
> >> +#define USB2_PHY_BASE_ADDR 0x382F0000
> >
> > Some time ago I sent a similar patch and the feedback from Marek was
> > that these
> > base addresses should be retrieved from the devicetree instead.
I didn't think Driver model was a requirement for SPL.
>
> I had problems getting the dwc3 to initialize properly when using the
> device model in the SPL. I'm currently just using this in the SPL and
> the device model in u-boot.
>
> I'll take another shot at initializing the dwc3 in the SPL with the DM.
Could we compromise by putting the #define statements in an ifdef to
only enable them when SPL is being built?
>
> Thanks
> Angus
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs
2021-12-17 17:03 ` Adam Ford
@ 2021-12-17 17:45 ` Fabio Estevam
2021-12-18 14:36 ` Angus Ainslie
0 siblings, 1 reply; 9+ messages in thread
From: Fabio Estevam @ 2021-12-17 17:45 UTC (permalink / raw)
To: Adam Ford
Cc: Angus Ainslie, U-Boot-Denx, NXP i.MX U-Boot Team, Stefano Babic,
Peng Fan, Marek Vasut, Ye Li, Alice Guo, Patrick Wildt,
Simon Glass, Frieder Schrempf, Marek Behún,
Ying-Chun Liu (PaulLiu),
kernel
On Fri, Dec 17, 2021 at 2:03 PM Adam Ford <aford173@gmail.com> wrote:
> I didn't think Driver model was a requirement for SPL.
That's my understanding as well.
> > I had problems getting the dwc3 to initialize properly when using the
> > device model in the SPL. I'm currently just using this in the SPL and
> > the device model in u-boot.
> >
> > I'll take another shot at initializing the dwc3 in the SPL with the DM.
>
> Could we compromise by putting the #define statements in an ifdef to
> only enable them when SPL is being built?
This looks like a a good idea.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs
2021-12-17 17:45 ` Fabio Estevam
@ 2021-12-18 14:36 ` Angus Ainslie
0 siblings, 0 replies; 9+ messages in thread
From: Angus Ainslie @ 2021-12-18 14:36 UTC (permalink / raw)
To: Fabio Estevam
Cc: Adam Ford, U-Boot-Denx, NXP i.MX U-Boot Team, Stefano Babic,
Peng Fan, Marek Vasut, Ye Li, Alice Guo, Patrick Wildt,
Simon Glass, Frieder Schrempf, Marek Behún,
Ying-Chun Liu (PaulLiu),
kernel
On 2021-12-17 09:45, Fabio Estevam wrote:
> On Fri, Dec 17, 2021 at 2:03 PM Adam Ford <aford173@gmail.com> wrote:
>
>> I didn't think Driver model was a requirement for SPL.
>
> That's my understanding as well.
>
>> > I had problems getting the dwc3 to initialize properly when using the
>> > device model in the SPL. I'm currently just using this in the SPL and
>> > the device model in u-boot.
>> >
>> > I'll take another shot at initializing the dwc3 in the SPL with the DM.
>>
>> Could we compromise by putting the #define statements in an ifdef to
>> only enable them when SPL is being built?
>
> This looks like a a good idea.
Thanks Fabian and Adam, I'll rework with the CONFIG_SPL_BUILD guards in
place.
Angus
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-12-18 14:36 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-12-17 15:20 [PATCH 0/3] add some imx8m power and clock control Angus Ainslie
2021-12-17 15:20 ` [PATCH 1/3] imx8m: clock_imx8mq: Add the ecspi clocks Angus Ainslie
2021-12-17 15:20 ` [PATCH 2/3] arch: imx8m: imx-regs.h add the USB regs Angus Ainslie
2021-12-17 16:28 ` Fabio Estevam
2021-12-17 16:34 ` Angus Ainslie
2021-12-17 17:03 ` Adam Ford
2021-12-17 17:45 ` Fabio Estevam
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