Re: [PATCH 1/3 v3] riscv: Remove OF_PRIOR_STAGE from RISC-V boards

From: Simon Glass <sjg@chromium.org>
To: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: "Tom Rini" <trini@konsulko.com>,
	"Mark Kettenis" <mark.kettenis@xs4all.nl>,
	"Bharat Gooty" <bharat.gooty@broadcom.com>,
	"Rayagonda Kokatanur" <rayagonda.kokatanur@broadcom.com>,
	"Rick Chen" <rick@andestech.com>, Leo <ycliang@andestech.com>,
	"Thomas Fitzsimmons" <fitzsim@fitzsim.org>,
	"Bin Meng" <bmeng.cn@gmail.com>,
	"Marek Behún" <marek.behun@nic.cz>,
	"Green Wan" <green.wan@sifive.com>,
	"Brad Kim" <brad.kim@semifive.com>,
	"Heinrich Schuchardt" <xypron.glpk@gmx.de>,
	"David Abdurachmanov" <david.abdurachmanov@sifive.com>,
	"Dimitri John Ledkov" <dimitri.ledkov@canonical.com>,
	"U-Boot Mailing List" <u-boot@lists.denx.de>
Subject: Re: [PATCH 1/3 v3] riscv: Remove OF_PRIOR_STAGE from RISC-V boards
Date: Mon, 11 Oct 2021 14:17:40 -0600	[thread overview]
Message-ID: <CAPnjgZ1C56V_+6LONu8fPrQTxyY9pk=7j4NbypxJ7urUbe_MTA@mail.gmail.com> (raw)
In-Reply-To: <20210930071800.443059-1-ilias.apalodimas@linaro.org>

Hi Ilias,

On Thu, 30 Sept 2021 at 01:18, Ilias Apalodimas
<ilias.apalodimas@linaro.org> wrote:
>
> At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
> introduced,  in order to support a DTB handed over by an earlier stage boot
> loader.  However we have another option in the Kconfig (OF_BOARD) which has
> identical semantics.
>
> On RISC-V some of the platforms pick up the DTB from a1 and copy it in their
> private gd_t.  Apart from that they copy it to prior_stage_fdt_address,  if
> the Kconfig option is selected, which is unnecessary.
>
> So let's switch the config option for those boards to OF_BOARD and define
> the required board_fdt_blob_setup() for them.
>
> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
> Changes since v2:
> - Adjusted board_fdt_blob_setup() for ax25-ae350 to cover OF_BOARD cases
> Changes since v1:
> - Remove the sifive unleashed/unmatched changes,  since they'll be handled
>  arch/riscv/cpu/cpu.c                    | 3 ---
>  arch/riscv/cpu/start.S                  | 5 -----
>  arch/riscv/dts/binman.dtsi              | 6 +++---
>  board/AndesTech/ax25-ae350/ax25-ae350.c | 7 ++++++-
>  board/emulation/qemu-riscv/qemu-riscv.c | 9 +++++++++
>  configs/ae350_rv32_defconfig            | 2 +-
>  configs/ae350_rv32_spl_defconfig        | 2 +-
>  configs/ae350_rv64_defconfig            | 2 +-
>  configs/ae350_rv64_spl_defconfig        | 2 +-
>  configs/qemu-riscv32_defconfig          | 2 +-
>  configs/qemu-riscv32_smode_defconfig    | 2 +-
>  configs/qemu-riscv32_spl_defconfig      | 2 +-
>  configs/qemu-riscv64_defconfig          | 2 +-
>  configs/qemu-riscv64_smode_defconfig    | 2 +-
>  configs/qemu-riscv64_spl_defconfig      | 2 +-
>  dts/Kconfig                             | 2 +-
>  16 files changed, 29 insertions(+), 23 deletions(-)
>

[..]

> diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
> index 81b0ee992372..6de91208258f 100644
> --- a/board/AndesTech/ax25-ae350/ax25-ae350.c
> +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
> @@ -21,7 +21,6 @@
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> -extern phys_addr_t prior_stage_fdt_address;
>  /*
>   * Miscellaneous platform dependent initializations
>   */
> @@ -57,7 +56,13 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
>
>  void *board_fdt_blob_setup(void)
>  {
> +#if CONFIG_IS_ENABLED(OF_BOARD)
> +       return (void *)gd->arch.firmware_fdt_addr;

This cast produces a warning for me, with qemu-riscv32

> +#elif CONFIG_IS_ENABLED(OF_SEPARATE)
>         return (void *)CONFIG_SYS_FDT_BASE;
> +#else
> +       return NULL;
> +#endif
>  }

Regards,
Simon