From: Neal Liu <neal_liu@aspeedtech.com>
To: ChiaWei Wang <chiawei_wang@aspeedtech.com>,
Ryan Chen <ryan_chen@aspeedtech.com>,
BMC-SW <BMC-SW@aspeedtech.com>, "joel@jms.id.au" <joel@jms.id.au>,
"u-boot@lists.denx.de" <u-boot@lists.denx.de>
Subject: RE: [PATCH] configs: ast2600: Move SPL bss section to DRAM space
Date: Thu, 2 Jun 2022 02:05:45 +0000 [thread overview]
Message-ID: <HK0PR06MB3202740DF08A4BF1FF62E45080DE9@HK0PR06MB3202.apcprd06.prod.outlook.com> (raw)
In-Reply-To: <20220601082115.10799-1-chiawei_wang@aspeedtech.com>
> The commit b583348ca8c8 ("image: fit: Align hash output buffers") places the
> hash output buffer at the .bss section. However, AST2600 by default executes
> SPL in the NOR flash XIP way. This results in the hash output cannot be written
> to the buffer as it is located at the R/X only region.
>
> We need to move the .bss section out of the SPL body to the DRAM space,
> where hash output can be written to. This patch includes:
> - Define the .bss section base and size
> - A new SPL linker script is added with a separate .bss region specified
> - Enable CONFIG_SPL_SEPARATE_BSS kconfig option
>
> Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
LGTM.
Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>
Best Regards,
-Neal
> ---
> arch/arm/mach-aspeed/ast2600/u-boot-spl.lds | 94
> +++++++++++++++++++++
> configs/evb-ast2600_defconfig | 3 +
> include/configs/evb_ast2600.h | 3 +
> 3 files changed, 100 insertions(+)
> create mode 100644 arch/arm/mach-aspeed/ast2600/u-boot-spl.lds
next prev parent reply other threads:[~2022-06-02 2:06 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-01 8:21 [PATCH] configs: ast2600: Move SPL bss section to DRAM space Chia-Wei Wang
2022-06-02 2:05 ` Neal Liu [this message]
2022-06-23 12:19 ` Tom Rini
2022-06-28 4:23 ` Joel Stanley
2022-06-28 4:57 ` Sean Anderson
2022-06-29 0:39 ` ChiaWei Wang
2022-06-29 0:36 ` ChiaWei Wang
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