From: Michal Orzel <michal.orzel@arm.com>
To: xen-devel@lists.xenproject.org
Cc: Stefano Stabellini <sstabellini@kernel.org>,
Julien Grall <julien@xen.org>,
Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
bertrand.marquis@arm.com
Subject: [PATCH 2/9] arm/domain: Get rid of READ/WRITE_SYSREG32
Date: Tue, 20 Apr 2021 09:08:46 +0200 [thread overview]
Message-ID: <20210420070853.8918-3-michal.orzel@arm.com> (raw)
In-Reply-To: <20210420070853.8918-1-michal.orzel@arm.com>
AArch64 system registers are 64bit whereas AArch32 ones
are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
we should get rid of helpers READ/WRITE_SYSREG32
in favour of using READ/WRITE_SYSREG.
We should also use register_t type when reading sysregs
which can correspond to uint64_t or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of registers: actlr, cntkctl to register_t.
Signed-off-by: Michal Orzel <michal.orzel@arm.com>
---
xen/arch/arm/domain.c | 20 ++++++++++----------
xen/include/asm-arm/domain.h | 4 ++--
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index bdd3d3e5b5..c021a03c61 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -113,13 +113,13 @@ static void ctxt_switch_from(struct vcpu *p)
p->arch.tpidr_el1 = READ_SYSREG(TPIDR_EL1);
/* Arch timer */
- p->arch.cntkctl = READ_SYSREG32(CNTKCTL_EL1);
+ p->arch.cntkctl = READ_SYSREG(CNTKCTL_EL1);
virt_timer_save(p);
if ( is_32bit_domain(p->domain) && cpu_has_thumbee )
{
- p->arch.teecr = READ_SYSREG32(TEECR32_EL1);
- p->arch.teehbr = READ_SYSREG32(TEEHBR32_EL1);
+ p->arch.teecr = READ_SYSREG(TEECR32_EL1);
+ p->arch.teehbr = READ_SYSREG(TEEHBR32_EL1);
}
#ifdef CONFIG_ARM_32
@@ -175,7 +175,7 @@ static void ctxt_switch_from(struct vcpu *p)
static void ctxt_switch_to(struct vcpu *n)
{
- uint32_t vpidr;
+ register_t vpidr;
/* When the idle VCPU is running, Xen will always stay in hypervisor
* mode. Therefore we don't need to restore the context of an idle VCPU.
@@ -183,8 +183,8 @@ static void ctxt_switch_to(struct vcpu *n)
if ( is_idle_vcpu(n) )
return;
- vpidr = READ_SYSREG32(MIDR_EL1);
- WRITE_SYSREG32(vpidr, VPIDR_EL2);
+ vpidr = READ_SYSREG(MIDR_EL1);
+ WRITE_SYSREG(vpidr, VPIDR_EL2);
WRITE_SYSREG(n->arch.vmpidr, VMPIDR_EL2);
/* VGIC */
@@ -257,8 +257,8 @@ static void ctxt_switch_to(struct vcpu *n)
if ( is_32bit_domain(n->domain) && cpu_has_thumbee )
{
- WRITE_SYSREG32(n->arch.teecr, TEECR32_EL1);
- WRITE_SYSREG32(n->arch.teehbr, TEEHBR32_EL1);
+ WRITE_SYSREG(n->arch.teecr, TEECR32_EL1);
+ WRITE_SYSREG(n->arch.teehbr, TEEHBR32_EL1);
}
#ifdef CONFIG_ARM_32
@@ -274,7 +274,7 @@ static void ctxt_switch_to(struct vcpu *n)
/* This is could trigger an hardware interrupt from the virtual
* timer. The interrupt needs to be injected into the guest. */
- WRITE_SYSREG32(n->arch.cntkctl, CNTKCTL_EL1);
+ WRITE_SYSREG(n->arch.cntkctl, CNTKCTL_EL1);
virt_timer_restore(n);
}
@@ -330,7 +330,7 @@ static void schedule_tail(struct vcpu *prev)
static void continue_new_vcpu(struct vcpu *prev)
{
- current->arch.actlr = READ_SYSREG32(ACTLR_EL1);
+ current->arch.actlr = READ_SYSREG(ACTLR_EL1);
processor_vcpu_initialise(current);
schedule_tail(prev);
diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
index 0a74df9931..2d4f38c669 100644
--- a/xen/include/asm-arm/domain.h
+++ b/xen/include/asm-arm/domain.h
@@ -156,7 +156,7 @@ struct arch_vcpu
/* Control Registers */
register_t sctlr;
- uint32_t actlr;
+ register_t actlr;
uint32_t cpacr;
uint32_t contextidr;
@@ -190,7 +190,7 @@ struct arch_vcpu
struct vgic_cpu vgic;
/* Timer registers */
- uint32_t cntkctl;
+ register_t cntkctl;
struct vtimer phys_timer;
struct vtimer virt_timer;
--
2.29.0
next prev parent reply other threads:[~2021-04-20 7:09 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-20 7:08 [PATCH 0/9] xen/arm64: Get rid of READ/WRITE_SYSREG32 Michal Orzel
2021-04-20 7:08 ` [PATCH 1/9] arm64/vfp: " Michal Orzel
2021-04-20 13:04 ` Julien Grall
2021-04-20 7:08 ` Michal Orzel [this message]
2021-04-20 13:12 ` [PATCH 2/9] arm/domain: " Julien Grall
2021-04-21 7:36 ` Michal Orzel
2021-04-21 10:20 ` Julien Grall
2021-04-20 7:08 ` [PATCH 3/9] arm/gic: " Michal Orzel
2021-04-20 13:28 ` Julien Grall
2021-04-21 7:48 ` Michal Orzel
2021-04-21 10:21 ` Julien Grall
2021-04-20 7:08 ` [PATCH 4/9] arm/p2m: " Michal Orzel
2021-04-20 13:31 ` Julien Grall
2021-04-20 7:08 ` [PATCH 5/9] arm/mm: " Michal Orzel
2021-04-20 13:37 ` Julien Grall
2021-04-22 11:47 ` Michal Orzel
2021-04-22 13:40 ` Julien Grall
2021-04-20 7:08 ` [PATCH 6/9] arm/page: " Michal Orzel
2021-04-21 15:11 ` Julien Grall
2021-04-20 7:08 ` [PATCH 7/9] arm/time,vtimer: " Michal Orzel
2021-04-21 16:01 ` Julien Grall
2021-04-20 7:08 ` [PATCH 8/9] arm: Change type of hsr to register_t Michal Orzel
2021-04-21 19:02 ` Julien Grall
2021-04-20 7:08 ` [PATCH 9/9] xen/arm64: Remove READ/WRITE_SYSREG32 helper macros Michal Orzel
2021-04-21 19:16 ` Julien Grall
2021-04-27 7:16 ` Michal Orzel
2021-04-27 8:30 ` Julien Grall
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