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From: Michal Orzel <michal.orzel@arm.com>
To: xen-devel@lists.xenproject.org
Cc: Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien@xen.org>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
	bertrand.marquis@arm.com
Subject: [PATCH 5/9] arm/mm: Get rid of READ/WRITE_SYSREG32
Date: Tue, 20 Apr 2021 09:08:49 +0200	[thread overview]
Message-ID: <20210420070853.8918-6-michal.orzel@arm.com> (raw)
In-Reply-To: <20210420070853.8918-1-michal.orzel@arm.com>

AArch64 system registers are 64bit whereas AArch32 ones
are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
we should get rid of helpers READ/WRITE_SYSREG32
in favour of using READ/WRITE_SYSREG.
We should also use register_t type when reading sysregs
which can correspond to uint64_t or uint32_t.
Even though many AArch64 sysregs have upper 32bit reserved
it does not mean that they can't be widen in the future.

Modify SCTLR_EL2 accesses to use READ/WRITE_SYSREG.

Signed-off-by: Michal Orzel <michal.orzel@arm.com>
---
 xen/arch/arm/mm.c    | 2 +-
 xen/arch/arm/traps.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 59f8a3f15f..0e07335291 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -613,7 +613,7 @@ void __init remove_early_mappings(void)
  */
 static void xen_pt_enforce_wnx(void)
 {
-    WRITE_SYSREG32(READ_SYSREG32(SCTLR_EL2) | SCTLR_Axx_ELx_WXN, SCTLR_EL2);
+    WRITE_SYSREG(READ_SYSREG(SCTLR_EL2) | SCTLR_Axx_ELx_WXN, SCTLR_EL2);
     /*
      * The TLBs may cache SCTLR_EL2.WXN. So ensure it is synchronized
      * before flushing the TLBs.
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index c7acdb2087..e7384381cc 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -915,7 +915,7 @@ static void _show_registers(const struct cpu_user_regs *regs,
     printk(" VTTBR_EL2: %016"PRIx64"\n", ctxt->vttbr_el2);
     printk("\n");
 
-    printk(" SCTLR_EL2: %08"PRIx32"\n", READ_SYSREG32(SCTLR_EL2));
+    printk(" SCTLR_EL2: %"PRIregister"\n", READ_SYSREG(SCTLR_EL2));
     printk("   HCR_EL2: %"PRIregister"\n", READ_SYSREG(HCR_EL2));
     printk(" TTBR0_EL2: %016"PRIx64"\n", READ_SYSREG64(TTBR0_EL2));
     printk("\n");
-- 
2.29.0



  parent reply	other threads:[~2021-04-20  7:09 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-20  7:08 [PATCH 0/9] xen/arm64: Get rid of READ/WRITE_SYSREG32 Michal Orzel
2021-04-20  7:08 ` [PATCH 1/9] arm64/vfp: " Michal Orzel
2021-04-20 13:04   ` Julien Grall
2021-04-20  7:08 ` [PATCH 2/9] arm/domain: " Michal Orzel
2021-04-20 13:12   ` Julien Grall
2021-04-21  7:36     ` Michal Orzel
2021-04-21 10:20       ` Julien Grall
2021-04-20  7:08 ` [PATCH 3/9] arm/gic: " Michal Orzel
2021-04-20 13:28   ` Julien Grall
2021-04-21  7:48     ` Michal Orzel
2021-04-21 10:21       ` Julien Grall
2021-04-20  7:08 ` [PATCH 4/9] arm/p2m: " Michal Orzel
2021-04-20 13:31   ` Julien Grall
2021-04-20  7:08 ` Michal Orzel [this message]
2021-04-20 13:37   ` [PATCH 5/9] arm/mm: " Julien Grall
2021-04-22 11:47     ` Michal Orzel
2021-04-22 13:40       ` Julien Grall
2021-04-20  7:08 ` [PATCH 6/9] arm/page: " Michal Orzel
2021-04-21 15:11   ` Julien Grall
2021-04-20  7:08 ` [PATCH 7/9] arm/time,vtimer: " Michal Orzel
2021-04-21 16:01   ` Julien Grall
2021-04-20  7:08 ` [PATCH 8/9] arm: Change type of hsr to register_t Michal Orzel
2021-04-21 19:02   ` Julien Grall
2021-04-20  7:08 ` [PATCH 9/9] xen/arm64: Remove READ/WRITE_SYSREG32 helper macros Michal Orzel
2021-04-21 19:16   ` Julien Grall
2021-04-27  7:16     ` Michal Orzel
2021-04-27  8:30       ` Julien Grall

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