Re: [PATCH v7 05/11] IOMMU/MMU: propagate IOMMU Device-TLB flush error up to iommu_iotlb_flush{, _all} (top level ones)

From: "Jan Beulich" <JBeulich@suse.com>
To: Julien Grall <julien.grall@arm.com>
Cc: Kevin Tian <kevin.tian@intel.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Steve Capper <Steve.Capper@arm.com>,
	dario.faggioli@citrix.com, xen-devel@lists.xen.org,
	Quan Xu <quan.xu@intel.com>
Subject: Re: [PATCH v7 05/11] IOMMU/MMU: propagate IOMMU Device-TLB flush error up to iommu_iotlb_flush{, _all} (top level ones)
Date: Thu, 09 Jun 2016 06:32:33 -0600	[thread overview]
Message-ID: <57597E0102000078000F3738@prv-mh.provo.novell.com> (raw)
In-Reply-To: <5759600A.6010808@arm.com>

>>> On 09.06.16 at 14:24, <julien.grall@arm.com> wrote:
> On 09/06/16 13:15, Jan Beulich wrote:
>>>>> On 09.06.16 at 14:08, <julien.grall@arm.com> wrote:
>>
>>>
>>> On 09/06/16 13:03, Julien Grall wrote:
>>>> On 09/06/16 12:45, Jan Beulich wrote:
>>>>>>>> On 09.06.16 at 13:12, <julien.grall@arm.com> wrote:
>>>>>> On 08/06/16 09:58, Xu, Quan wrote:
>>>>>>> From: Quan Xu <quan.xu@intel.com>
>>>>>>>
>>>>>>> Signed-off-by: Quan Xu <quan.xu@intel.com>
>>>>>>> Reviewed-by: Jan Beulich <jbeulich@suse.com>
>>>>>>>
>>>>>>> CC: Stefano Stabellini <sstabellini@kernel.org>
>>>>>>> CC: Julien Grall <julien.grall@arm.com>
>>>>>>> CC: Jan Beulich <jbeulich@suse.com>
>>>>>>> CC: Kevin Tian <kevin.tian@intel.com>
>>>>>>> ---
>>>>>>>     xen/arch/arm/p2m.c                  |  4 +++-
>>>>>>>     xen/common/memory.c                 | 12 ++++++++++--
>>>>>>>     xen/drivers/passthrough/iommu.c     | 13 +++++++++----
>>>>>>>     xen/drivers/passthrough/x86/iommu.c |  5 +++--
>>>>>>>     xen/include/xen/iommu.h             |  5 +++--
>>>>>>>     5 files changed, 28 insertions(+), 11 deletions(-)
>>>>>>>
>>>>>>> diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
>>>>>>> index 6a19c57..65d8f1a 100644
>>>>>>> --- a/xen/arch/arm/p2m.c
>>>>>>> +++ b/xen/arch/arm/p2m.c
>>>>>>> @@ -1178,7 +1178,9 @@ out:
>>>>>>>         if ( flush )
>>>>>>>         {
>>>>>>>             flush_tlb_domain(d);
>>>>>>> -        iommu_iotlb_flush(d, sgfn, egfn - sgfn);
>>>>>>> +        ret = iommu_iotlb_flush(d, sgfn, egfn - sgfn);
>>>>>>
>>>>>> Sorry for coming late in the discussion. What kind of error do you
>>>>>> expect to return with iommu_tlb_flush?
>>>>>>
>>>>>> Today the ARM SMMU will always return 0 if the TLB flush timeout (see
>>>>>> arm_smmu_tlb_inv_context).
>>>>>>
>>>>>> We may want in the future to return an error when it has timeout,
>>>>>> however only returning an error is not safe at all. The TLB may contain
>>>>>> entries which are invalid (because we remove the mapping earlier) and a
>>>>>> device/domain could take advantage of that.
>>>>>>
>>>>>> So I am not sure if we should let running the guest when a flush has
>>>>>> timeout. Any thoughts?
>>>>>
>>>>> Well, did you look at the rest of this series, and the other dependent
>>>>> one? Guests (other than Dom0) get crashed when a flush times out. I
>>>
>>> I missed the bit "other dependent one". Which series are you talking
>>> about? The cover letter does not give any dependent series...
>>
>> "[Patch v11 0/3] VT-d Device-TLB flush issue"
> 
> To be honest, I am usually not going through x86 patch. In this case, 
> the only call to domain_crash I can spot is in patch #2 which is Intel 
> VTD specific.

Which is why I said you probably want this on ARM too.

> So the behavior of iommu_iotlb_flush is up to the IOMMU driver. Whilst 
> the behavior of iommu_{,un}map_page are defined by the common code.

I'm certainly up for moving the logic up to the generic IOMMU layer,
if that's feasible.

Jan

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel