From: "Maciej W. Rozycki" <macro@linux-mips.org>
To: Richard Henderson <rth@twiddle.net>
Cc: Yongbok Kim <yongbok.kim@imgtec.com>,
peter.maydell@linaro.org, leon.alrae@imgtec.com,
qemu-devel@nongnu.org, afaerber@suse.de
Subject: Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA
Date: Wed, 13 May 2015 20:56:37 +0100 (BST) [thread overview]
Message-ID: <alpine.LFD.2.11.1505132048290.1538@eddie.linux-mips.org> (raw)
In-Reply-To: <5553A5C4.6030902@twiddle.net>
On Wed, 13 May 2015, Richard Henderson wrote:
> > +static inline void ensure_atomic_msa_block_access(CPUMIPSState *env,
> > + target_ulong addr,
> > + int rw,
> > + int mmu_idx)
> > {
> > +#if !defined(CONFIG_USER_ONLY)
> > +#define MSA_PAGESPAN(x) (unlikely((((x) & ~TARGET_PAGE_MASK) \
> > + + MSA_WRLEN/8 - 1) >= TARGET_PAGE_SIZE))
> > + CPUState *cs = CPU(mips_env_get_cpu(env));
> > + target_ulong page_addr;
> >
> > + if (MSA_PAGESPAN(addr)) {
> > + /* first page */
> > + tlb_fill(cs, addr, rw, mmu_idx, 0);
> > + /* second page */
> > + page_addr = (addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
> > + tlb_fill(cs, page_addr, rw, mmu_idx, 0);
> > }
> > +#endif
> > }
>
> This doesn't do quite what you think it does. It does trap if the page isn't
> mapped at all, but it doesn't trap if e.g. rw is set and the page is read-only.
> That requires a subsequent check for what permissions were installed by
> tlb_set_page.
>
> I had thought there was a way to look this up besides duplicating the code in
> softmmu_template.h, but I suppose that's in a patch set that never made it in.
We must have a way to deal with memory access operations issued by a
single machine instruction crossing a page boundary already as this is
what MIPS16 SAVE and RESTORE instructions as well as microMIPS SWP, SDP,
SWM, SDM, LWP, LDP, LWM and LDM ones do. Perhaps these are worth
looking into and their approach copying (or reusing) here?
Maciej
next prev parent reply other threads:[~2015-05-13 19:56 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-13 15:37 [Qemu-devel] [PATCH v3 0/2] target-mips: Add support for misaligned accesses Yongbok Kim
2015-05-13 15:37 ` [Qemu-devel] [PATCH v3 1/2] target-mips: Misaligned memory accesses for R6 Yongbok Kim
2015-05-13 15:37 ` [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA Yongbok Kim
2015-05-13 19:28 ` Richard Henderson
2015-05-13 19:56 ` Maciej W. Rozycki [this message]
2015-05-13 19:58 ` Richard Henderson
2015-05-13 20:59 ` Leon Alrae
2015-05-13 21:21 ` Maciej W. Rozycki
2015-05-13 21:36 ` Richard Henderson
2015-05-13 22:54 ` Maciej W. Rozycki
2015-05-14 8:51 ` Leon Alrae
2015-05-14 11:22 ` Maciej W. Rozycki
2015-05-13 21:31 ` Richard Henderson
2015-05-14 9:00 ` Yongbok Kim
2015-05-14 9:46 ` Yongbok Kim
2015-05-14 18:44 ` Richard Henderson
2015-05-14 9:50 ` Leon Alrae
2015-05-14 15:27 ` Richard Henderson
2015-05-14 19:12 ` Richard Henderson
2015-05-15 12:09 ` Leon Alrae
2015-05-15 13:43 ` Richard Henderson
2015-05-15 14:04 ` Leon Alrae
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