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From: "Maciej W. Rozycki" <macro@linux-mips.org>
To: Leon Alrae <leon.alrae@imgtec.com>
Cc: Yongbok Kim <yongbok.kim@imgtec.com>,
	peter.maydell@linaro.org, qemu-devel@nongnu.org,
	afaerber@suse.de, Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA
Date: Thu, 14 May 2015 12:22:05 +0100 (BST)	[thread overview]
Message-ID: <alpine.LFD.2.11.1505141220060.19904@eddie.linux-mips.org> (raw)
In-Reply-To: <55546211.4020301@imgtec.com>

On Thu, 14 May 2015, Leon Alrae wrote:

> >  I don't think we have.  The specification is a bit unclear I must admit 
> > and it also defines the details of vector load and store operations as 
> > implementation dependent, so there's no further clarification.
> 
> This is specified in "MIPS Architecture For Programmers Volume I-A:
> Introduction to the MIPS64 Architecture", Revision: 6.01, Imagination
> Technologies, Document Number: MD00083, August 20, 2014, p.142:
> 
> "For example, a misaligned vector load instruction will never leave its
> vector destination register half written, if part of a page split
> succeeds and the other part takes an exception. It is either all done,
> or not at all."

 Thanks.  It's good to see r6 has clarified the matters around here and 
I think we can (and for simplicity ought to) apply them to r5 too.

  Maciej

  reply	other threads:[~2015-05-14 11:22 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-13 15:37 [Qemu-devel] [PATCH v3 0/2] target-mips: Add support for misaligned accesses Yongbok Kim
2015-05-13 15:37 ` [Qemu-devel] [PATCH v3 1/2] target-mips: Misaligned memory accesses for R6 Yongbok Kim
2015-05-13 15:37 ` [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA Yongbok Kim
2015-05-13 19:28   ` Richard Henderson
2015-05-13 19:56     ` Maciej W. Rozycki
2015-05-13 19:58       ` Richard Henderson
2015-05-13 20:59         ` Leon Alrae
2015-05-13 21:21           ` Maciej W. Rozycki
2015-05-13 21:36             ` Richard Henderson
2015-05-13 22:54               ` Maciej W. Rozycki
2015-05-14  8:51                 ` Leon Alrae
2015-05-14 11:22                   ` Maciej W. Rozycki [this message]
2015-05-13 21:31           ` Richard Henderson
2015-05-14  9:00     ` Yongbok Kim
2015-05-14  9:46       ` Yongbok Kim
2015-05-14 18:44         ` Richard Henderson
2015-05-14  9:50     ` Leon Alrae
2015-05-14 15:27       ` Richard Henderson
2015-05-14 19:12         ` Richard Henderson
2015-05-15 12:09           ` Leon Alrae
2015-05-15 13:43             ` Richard Henderson
2015-05-15 14:04               ` Leon Alrae

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