Re: [Intel-gfx] [PATCH v2 18/22] drm/i915/rkl: Handle comp master/slave relationships for PHYs

["Srivatsa, Anusha" <anusha.srivatsa@intel.com>]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Matt
> Roper
> Sent: Tuesday, May 5, 2020 4:22 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: De Marchi, Lucas <lucas.demarchi@intel.com>
> Subject: [Intel-gfx] [PATCH v2 18/22] drm/i915/rkl: Handle comp master/slave
> relationships for PHYs
> 
> Certain combo PHYs act as a compensation master to other PHYs and need to
> be initialized with a special irefgen bit in the PORT_COMP_DW8 register.
> Previously PHY A was the only compensation master (for PHYs B & C), but RKL
> adds a fourth PHY which is slaved to PHY C instead.
> 
> Bspec: 49291
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Aditya Swarup <aditya.swarup@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  .../gpu/drm/i915/display/intel_combo_phy.c    | 25 +++++++++++++++++--
>  1 file changed, 23 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c
> b/drivers/gpu/drm/i915/display/intel_combo_phy.c
> index 43d8784f6fa0..77b04bb3ec62 100644
> --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
> @@ -234,6 +234,27 @@ static bool ehl_vbt_ddi_d_present(struct
> drm_i915_private *i915)
>  	return false;
>  }
> 
> +static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy
> +phy) {
> +	/*
> +	 * Certain PHYs are connected to compensation resistors and act
> +	 * as masters to other PHYs.
> +	 *
> +	 * ICL,TGL:
> +	 *   A(master) -> B(slave), C(slave)
> +	 * RKL:
> +	 *   A(master) -> B(slave)
> +	 *   C(master) -> D(slave)
> +	 *
> +	 * We must set the IREFGEN bit for any PHY acting as a master
> +	 * to another PHY.
> +	 */
> +	if (IS_ROCKETLAKE(dev_priv) && phy == PHY_C)
> +		return true;
> +
> +	return phy == PHY_A;
> +}
> +
>  static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
>  				       enum phy phy)
>  {
> @@ -245,7 +266,7 @@ static bool icl_combo_phy_verify_state(struct
> drm_i915_private *dev_priv,
> 
>  	ret = cnl_verify_procmon_ref_values(dev_priv, phy);
> 
> -	if (phy == PHY_A) {
> +	if (phy_is_master(dev_priv, phy)) {
>  		ret &= check_phy_reg(dev_priv, phy,
> ICL_PORT_COMP_DW8(phy),
>  				     IREFGEN, IREFGEN);
> 
> @@ -356,7 +377,7 @@ static void icl_combo_phys_init(struct
> drm_i915_private *dev_priv)
>  skip_phy_misc:
>  		cnl_set_procmon_ref_values(dev_priv, phy);
> 
> -		if (phy == PHY_A) {
> +		if (phy_is_master(dev_priv, phy)) {
>  			val = intel_de_read(dev_priv,
> ICL_PORT_COMP_DW8(phy));
>  			val |= IREFGEN;
>  			intel_de_write(dev_priv, ICL_PORT_COMP_DW8(phy),
> val);
> --
> 2.24.1
> 
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