From: Conor Dooley <conor.dooley@microchip.com>
To: <palmer@dabbelt.com>
Cc: devicetree@vger.kernel.org, Albert Ou <aou@eecs.berkeley.edu>,
Jonathan Corbet <corbet@lwn.net>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
conor@kernel.org, conor.dooley@microchip.com,
Rob Herring <robh+dt@kernel.org>, Evan Green <evan@rivosinc.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
linux-riscv@lists.infradead.org,
Heiko Stuebner <heiko.stuebner@vrull.eu>,
Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH v3 00/11] RISC-V: Probe DT extension support using riscv,isa-extensions & riscv,isa-base
Date: Mon, 3 Jul 2023 11:27:52 +0100 [thread overview]
Message-ID: <20230703-repayment-vocalist-e4f3eeac2b2a@wendy> (raw)
Hey,
Based on my latest iteration of deprecating riscv,isa [1], here's an
implementation of the new properties for Linux. The first few patches,
up to "RISC-V: split riscv_fill_hwcap() in 3", are all prep work that
further tames some of the extension related code, on top of my already
applied series that cleans up the ISA string parser.
Perhaps "RISC-V: shunt isa_ext_arr to cpufeature.c" is a bit gratuitous,
but I figured a bit of coalescing of extension related data structures
would be a good idea. Note that riscv,isa will still be used in the
absence of the new properties. Palmer suggested adding a Kconfig option
to turn off the fallback for DT, which I have gone and done. It's locked
behind the NONPORTABLE option for good reason.
In v2, I've also come up with a more reasonable name for the new
function I added & fixed up various comments from Drew and Evan.
In v3, there's the new commandline option that Drew suggested. I have
Also picked up a patch from Palmer that adds more helpful prints where
harts fail the checks in riscv_early_of_processor_id(), and I've
sprinkled a few more of those prints in my new additions to the
function.
Cheers,
Conor.
[1] https://lore.kernel.org/all/20230702-eats-scorebook-c951f170d29f@spud
CC: Rob Herring <robh+dt@kernel.org>
CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
CC: Paul Walmsley <paul.walmsley@sifive.com>
CC: Palmer Dabbelt <palmer@dabbelt.com>
CC: Albert Ou <aou@eecs.berkeley.edu>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Andrew Jones <ajones@ventanamicro.com>
CC: Heiko Stuebner <heiko.stuebner@vrull.eu>
CC: Evan Green <evan@rivosinc.com>
CC: Sunil V L <sunilvl@ventanamicro.com>
CC: linux-doc@vger.kernel.org
CC: linux-riscv@lists.infradead.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
Conor Dooley (9):
RISC-V: drop a needless check in print_isa_ext()
RISC-V: shunt isa_ext_arr to cpufeature.c
RISC-V: repurpose riscv_isa_ext array in riscv_fill_hwcap()
RISC-V: add missing single letter extension definitions
RISC-V: add single letter extensions to riscv_isa_ext
RISC-V: split riscv_fill_hwcap() in 3
RISC-V: enable extension detection from new properties
RISC-V: try new extension properties in of_early_processor_hartid()
RISC-V: provide Kconfig & commandline options to control parsing
"riscv,isa"
Heiko Stuebner (1):
RISC-V: don't parse dt/acpi isa string to get rv32/rv64
Palmer Dabbelt (1):
RISC-V: Provide a more helpful error message on invalid ISA strings
.../admin-guide/kernel-parameters.txt | 7 +
arch/riscv/Kconfig | 18 +
arch/riscv/include/asm/hwcap.h | 17 +-
arch/riscv/kernel/cpu.c | 177 ++----
arch/riscv/kernel/cpufeature.c | 519 ++++++++++++------
5 files changed, 436 insertions(+), 302 deletions(-)
--
2.40.1
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next reply other threads:[~2023-07-03 10:29 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-03 10:27 Conor Dooley [this message]
2023-07-03 10:27 ` [PATCH v3 01/11] RISC-V: Provide a more helpful error message on invalid ISA strings Conor Dooley
2023-07-03 10:36 ` Andrew Jones
2023-07-05 15:51 ` Evan Green
2023-07-03 10:27 ` [PATCH v3 02/11] RISC-V: don't parse dt/acpi isa string to get rv32/rv64 Conor Dooley
2023-07-03 16:17 ` Conor Dooley
2023-07-03 10:27 ` [PATCH v3 03/11] RISC-V: drop a needless check in print_isa_ext() Conor Dooley
2023-07-03 10:27 ` [PATCH v3 04/11] RISC-V: shunt isa_ext_arr to cpufeature.c Conor Dooley
2023-07-03 16:17 ` Conor Dooley
2023-07-03 10:27 ` [PATCH v3 05/11] RISC-V: repurpose riscv_isa_ext array in riscv_fill_hwcap() Conor Dooley
2023-07-03 10:27 ` [PATCH v3 06/11] RISC-V: add missing single letter extension definitions Conor Dooley
2023-07-03 16:18 ` Conor Dooley
2023-07-03 10:27 ` [PATCH v3 07/11] RISC-V: add single letter extensions to riscv_isa_ext Conor Dooley
2023-07-03 10:28 ` [PATCH v3 08/11] RISC-V: split riscv_fill_hwcap() in 3 Conor Dooley
2023-07-03 10:28 ` [PATCH v3 09/11] RISC-V: enable extension detection from new properties Conor Dooley
2023-07-03 10:28 ` [PATCH v3 10/11] RISC-V: try new extension properties in of_early_processor_hartid() Conor Dooley
2023-07-03 10:28 ` [PATCH v3 11/11] RISC-V: provide Kconfig & commandline options to control parsing "riscv,isa" Conor Dooley
2023-07-03 10:44 ` Andrew Jones
2023-07-04 7:12 ` Conor Dooley
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