linux-riscv.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Inochi Amaoto <inochiama@outlook.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Chao Wei <chao.wei@sophgo.com>,
	Chen Wang <unicorn_wang@outlook.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Anup Patel <anup@brainfault.org>
Cc: Jisheng Zhang <jszhang@kernel.org>,
	Inochi Amaoto <inochiama@outlook.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: [PATCH v2 0/7] Add Huashan Pi board support
Date: Mon,  9 Oct 2023 19:25:14 +0800	[thread overview]
Message-ID: <IA1PR20MB49531C1C34C3E972DBBA4151BBCEA@IA1PR20MB4953.namprd20.prod.outlook.com> (raw)

Huashan Pi board is an embedded development platform based on the
CV1812H chip. Add minimal device tree files for this board.
Currently, it can boot to a basic shell.

NOTE: this series is based on the Jisheng's Milk-V Duo patch.

Link: https://en.sophgo.com/product/introduce/huashan.html
Link: https://en.sophgo.com/product/introduce/cv181xH.html

Changed from v1:
1. split the patch into several patch and refactor them.

Inochi Amaoto (7):
  dt-bindings: interrupt-controller: Add SOPHGO CV1812H plic
  dt-bindings: timer: Add SOPHGO CV1812H clint
  dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles
  riscv: dts: sophgo: Separate common devices from cv1800b soc
  riscv: dts: sophgo: cv180x: Add gpio devices
  riscv: dts: sophgo: add initial CV1812H SoC device tree
  riscv: dts: sophgo: add Huashan Pi board device tree

 .../sifive,plic-1.0.0.yaml                    |  1 +
 .../devicetree/bindings/riscv/sophgo.yaml     |  4 +
 .../bindings/timer/sifive,clint.yaml          |  1 +
 arch/riscv/boot/dts/sophgo/Makefile           |  1 +
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi       | 95 +------------------
 .../dts/sophgo/{cv1800b.dtsi => cv180x.dtsi}  | 91 ++++++++++++++----
 .../boot/dts/sophgo/cv1812h-huashan-pi.dts    | 48 ++++++++++
 arch/riscv/boot/dts/sophgo/cv1812h.dtsi       | 36 +++++++
 8 files changed, 165 insertions(+), 112 deletions(-)
 copy arch/riscv/boot/dts/sophgo/{cv1800b.dtsi => cv180x.dtsi} (58%)
 create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
 create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h.dtsi

--
2.42.0


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

             reply	other threads:[~2023-10-09 11:25 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-09 11:25 Inochi Amaoto [this message]
2023-10-09 11:26 ` [PATCH v2 1/7] dt-bindings: interrupt-controller: Add SOPHGO CV1812H plic Inochi Amaoto
2023-10-09 11:30   ` Krzysztof Kozlowski
     [not found] ` <20231009112642.477337-1-inochiama@outlook.com>
2023-10-09 11:26   ` [PATCH v2 2/7] dt-bindings: timer: Add SOPHGO CV1812H clint Inochi Amaoto
2023-10-09 11:30     ` Krzysztof Kozlowski
2023-10-09 11:26   ` [PATCH v2 3/7] dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles Inochi Amaoto
2023-10-09 11:30     ` Krzysztof Kozlowski
2023-10-09 11:26   ` [PATCH v2 4/7] riscv: dts: sophgo: Separate common devices from cv1800b soc Inochi Amaoto
2023-10-12 10:46     ` Chen Wang
2023-10-12 12:50     ` Chen Wang
2023-10-13  9:08     ` Conor Dooley
2023-10-13  9:50       ` [PATCH v2 6/7] riscv: dts: sophgo: add initial CV1812H SoC device tree Inochi Amaoto
2023-10-13  9:52       ` [PATCH v2 6/7] riscv: dts: sophgo: Separate common devices from cv1800b soc Inochi Amaoto
2023-10-13 13:27         ` Conor Dooley
2023-10-13 22:36           ` [PATCH v2 4/7] " Inochi Amaoto
2023-10-14  9:04       ` Jisheng Zhang
2023-10-14  9:28         ` Conor Dooley
2023-10-09 11:26   ` [PATCH v2 5/7] riscv: dts: sophgo: cv180x: Add gpio devices Inochi Amaoto
2023-10-12 12:52     ` Chen Wang
2023-10-09 11:26   ` [PATCH v2 6/7] riscv: dts: sophgo: add initial CV1812H SoC device tree Inochi Amaoto
2023-10-10  7:21     ` Chen Wang
2023-10-10  7:53       ` Inochi Amaoto
2023-10-12  9:41         ` Conor Dooley
2023-10-12 13:02           ` Chen Wang
2023-10-09 11:26   ` [PATCH v2 7/7] riscv: dts: sophgo: add Huashan Pi board " Inochi Amaoto
2023-10-12 12:53     ` Chen Wang
2023-10-12 13:20 ` [PATCH v2 0/7] Add Huashan Pi board support Jisheng Zhang
2023-10-13  8:48 ` Krzysztof Kozlowski
2023-10-13  8:55   ` Inochi Amaoto
2023-10-13  9:00   ` Inochi Amaoto

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=IA1PR20MB49531C1C34C3E972DBBA4151BBCEA@IA1PR20MB4953.namprd20.prod.outlook.com \
    --to=inochiama@outlook.com \
    --cc=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=chao.wei@sophgo.com \
    --cc=conor+dt@kernel.org \
    --cc=daniel.lezcano@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jszhang@kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=maz@kernel.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=tglx@linutronix.de \
    --cc=unicorn_wang@outlook.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).