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From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: riku.voipio@iki.fi, richard.henderson@linaro.org,
	laurent@vivier.eu, Taylor Simpson <tsimpson@quicinc.com>,
	philmd@redhat.com, aleksandar.m.mail@gmail.com
Subject: [RFC PATCH v2 42/67] Hexagon TCG generation - step 04
Date: Fri, 28 Feb 2020 10:43:38 -0600	[thread overview]
Message-ID: <1582908244-304-43-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1582908244-304-1-git-send-email-tsimpson@quicinc.com>

Override store instructions

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 target/hexagon/helper_overrides.h | 241 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 241 insertions(+)

diff --git a/target/hexagon/helper_overrides.h b/target/hexagon/helper_overrides.h
index 20d8584..fdcc517 100644
--- a/target/hexagon/helper_overrides.h
+++ b/target/hexagon/helper_overrides.h
@@ -636,4 +636,245 @@
 #define fWRAP_L4_ploadrdfnew_abs(GENHLPR, SHORTCODE) \
     fWRAP_PRED_LOAD_PAIR(fEA_IMM(uiV), fLSBNEWNOT(PtN))
 
+/* load-locked and store-locked */
+#define fWRAP_L2_loadw_locked(GENHLPR, SHORTCODE) \
+    SHORTCODE
+#define fWRAP_L4_loadd_locked(GENHLPR, SHORTCODE) \
+    SHORTCODE
+#define fWRAP_S2_storew_locked(GENHLPR, SHORTCODE) \
+    do { SHORTCODE; READ_PREG(PdV, PdN); } while (0)
+#define fWRAP_S4_stored_locked(GENHLPR, SHORTCODE) \
+    do { SHORTCODE; READ_PREG(PdV, PdN); } while (0)
+
+#define fWRAP_STORE(SHORTCODE) \
+    do { \
+        TCGv HALF = tcg_temp_new(); \
+        TCGv BYTE = tcg_temp_new(); \
+        TCGv NEWREG_ST = tcg_temp_new(); \
+        TCGv tmp = tcg_temp_new(); \
+        SHORTCODE; \
+        tcg_temp_free(HALF); \
+        tcg_temp_free(BYTE); \
+        tcg_temp_free(NEWREG_ST); \
+        tcg_temp_free(tmp); \
+    } while (0)
+
+#define fWRAP_STORE_ap(STORE) \
+    do { \
+        TCGv HALF = tcg_temp_new(); \
+        TCGv BYTE = tcg_temp_new(); \
+        TCGv NEWREG_ST = tcg_temp_new(); \
+        { \
+            fEA_IMM(UiV); \
+            STORE; \
+            tcg_gen_movi_tl(ReV, UiV); \
+        } \
+        tcg_temp_free(HALF); \
+        tcg_temp_free(BYTE); \
+        tcg_temp_free(NEWREG_ST); \
+    } while (0)
+
+#define fWRAP_STORE_pcr(SHIFT, STORE) \
+    do { \
+        TCGv ireg = tcg_temp_new(); \
+        TCGv HALF = tcg_temp_new(); \
+        TCGv BYTE = tcg_temp_new(); \
+        TCGv NEWREG_ST = tcg_temp_new(); \
+        TCGv tmp = tcg_temp_new(); \
+        fEA_REG(RxV); \
+        fPM_CIRR(RxV, fREAD_IREG(MuV, SHIFT), MuV); \
+        STORE; \
+        tcg_temp_free(ireg); \
+        tcg_temp_free(HALF); \
+        tcg_temp_free(BYTE); \
+        tcg_temp_free(NEWREG_ST); \
+        tcg_temp_free(tmp); \
+    } while (0)
+
+#define fWRAP_S2_storerb_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerb_pi(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerb_ap(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_ap(fSTORE(1, 1, EA, fGETBYTE(0, RtV)))
+#define fWRAP_S2_storerb_pr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerb_ur(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerb_pbr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerb_pci(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerb_pcr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_pcr(0, fSTORE(1, 1, EA, fGETBYTE(0, RtV)))
+#define fWRAP_S4_storerb_rr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerbnew_rr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeirb_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbgp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS1_storeb_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_storebi0(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerh_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerh_pi(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerh_ap(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_ap(fSTORE(1, 2, EA, fGETHALF(0, RtV)))
+#define fWRAP_S2_storerh_pr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerh_ur(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerh_pbr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerh_pci(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerh_pcr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_pcr(1, fSTORE(1, 2, EA, fGETHALF(0, RtV)))
+#define fWRAP_S4_storerh_rr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeirh_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhgp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_storeh_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerf_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerf_pi(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerf_ap(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_ap(fSTORE(1, 2, EA, fGETHALF(1, RtV)))
+#define fWRAP_S2_storerf_pr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerf_ur(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerf_pbr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerf_pci(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerf_pcr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_pcr(1, fSTORE(1, 2, EA, fGETHALF(1, RtV)))
+#define fWRAP_S4_storerf_rr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerfgp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storeri_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storeri_pi(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeri_ap(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_ap(fSTORE(1, 4, EA, RtV))
+#define fWRAP_S2_storeri_pr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeri_ur(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storeri_pbr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storeri_pci(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storeri_pcr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_pcr(2, fSTORE(1, 4, EA, RtV))
+#define fWRAP_S4_storeri_rr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerinew_rr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeiri_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerigp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS1_storew_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_storew_sp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_storewi0(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerd_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerd_pi(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerd_ap(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_ap(fSTORE(1, 8, EA, RttV))
+#define fWRAP_S2_storerd_pr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerd_ur(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerd_pbr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerd_pci(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerd_pcr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_pcr(3, fSTORE(1, 8, EA, RttV))
+#define fWRAP_S4_storerd_rr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerdgp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_stored_sp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerbnew_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbnew_pi(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerbnew_ap(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_ap(fSTORE(1, 1, EA, fGETBYTE(0, fNEWREG_ST(NtN))))
+#define fWRAP_S2_storerbnew_pr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerbnew_ur(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbnew_pbr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbnew_pci(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbnew_pcr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_pcr(0, fSTORE(1, 1, EA, fGETBYTE(0, fNEWREG_ST(NtN))))
+#define fWRAP_S2_storerbnewgp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerhnew_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhnew_pi(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerhnew_ap(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_ap(fSTORE(1, 2, EA, fGETHALF(0, fNEWREG_ST(NtN))))
+#define fWRAP_S2_storerhnew_pr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerhnew_ur(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhnew_pbr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhnew_pci(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhnew_pcr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_pcr(1, fSTORE(1, 2, EA, fGETHALF(0, fNEWREG_ST(NtN))))
+#define fWRAP_S2_storerhnewgp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerinew_io(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerinew_pi(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerinew_ap(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_ap(fSTORE(1, 4, EA, fNEWREG_ST(NtN)))
+#define fWRAP_S2_storerinew_pr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerinew_ur(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerinew_pbr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerinew_pci(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerinew_pcr(GENHLPR, SHORTCODE) \
+    fWRAP_STORE_pcr(2, fSTORE(1, 4, EA, fNEWREG_ST(NtN)))
+#define fWRAP_S2_storerinewgp(GENHLPR, SHORTCODE) \
+    fWRAP_STORE(SHORTCODE)
+
 #endif
-- 
2.7.4


  parent reply	other threads:[~2020-02-28 17:35 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-28 16:42 [RFC PATCH v2 00/67] Hexagon patch series Taylor Simpson
2020-02-28 16:42 ` [RFC PATCH v2 01/67] Hexagon Maintainers Taylor Simpson
2020-02-28 16:42 ` [RFC PATCH v2 02/67] Hexagon README Taylor Simpson
2020-02-28 16:42 ` [RFC PATCH v2 03/67] Hexagon ELF Machine Definition Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 04/67] Hexagon CPU Scalar Core Definition Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 05/67] Hexagon register names Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 06/67] Hexagon Disassembler Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 07/67] Hexagon CPU Scalar Core Helpers Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 08/67] Hexagon GDB Stub Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 09/67] Hexagon architecture types Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 10/67] Hexagon instruction and packet types Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 11/67] Hexagon register fields Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 12/67] Hexagon instruction attributes Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 13/67] Hexagon register map Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 14/67] Hexagon instruction/packet decode Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 15/67] Hexagon instruction printing Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 16/67] Hexagon arch import - instruction semantics definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 17/67] Hexagon arch import - macro definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 18/67] Hexagon arch import - instruction encoding Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 19/67] Hexagon instruction class definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 20/67] Hexagon instruction utility functions Taylor Simpson
2020-04-09 18:53   ` Brian Cain
2020-04-09 20:22     ` Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 21/67] Hexagon generator phase 1 - C preprocessor for semantics Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 22/67] Hexagon generator phase 2 - qemu_def_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 23/67] Hexagon generator phase 2 - qemu_wrap_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 24/67] Hexagon generator phase 2 - opcodes_def_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 25/67] Hexagon generator phase 2 - op_attribs_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 26/67] Hexagon generator phase 2 - op_regs_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 27/67] Hexagon generator phase 2 - printinsn-generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 28/67] Hexagon generator phase 3 - C preprocessor for decode tree Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 29/67] Hexagon generater phase 4 - Decode tree Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 30/67] Hexagon opcode data structures Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 31/67] Hexagon macros to interface with the generator Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 32/67] Hexagon macros referenced in instruction semantics Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 33/67] Hexagon instruction classes Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 34/67] Hexagon TCG generation helpers - step 1 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 35/67] Hexagon TCG generation helpers - step 2 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 36/67] Hexagon TCG generation helpers - step 3 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 37/67] Hexagon TCG generation helpers - step 4 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 38/67] Hexagon TCG generation helpers - step 5 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 39/67] Hexagon TCG generation - step 01 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 40/67] Hexagon TCG generation - step 02 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 41/67] Hexagon TCG generation - step 03 Taylor Simpson
2020-02-28 16:43 ` Taylor Simpson [this message]
2020-02-28 16:43 ` [RFC PATCH v2 43/67] Hexagon TCG generation - step 05 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 44/67] Hexagon TCG generation - step 06 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 45/67] Hexagon TCG generation - step 07 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 46/67] Hexagon TCG generation - step 08 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 47/67] Hexagon TCG generation - step 09 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 48/67] Hexagon TCG generation - step 10 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 49/67] Hexagon TCG generation - step 11 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 50/67] Hexagon TCG generation - step 12 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 51/67] Hexagon translation Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 52/67] Hexagon Linux user emulation Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 53/67] Hexagon build infrastructure Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 54/67] Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 55/67] Hexagon HVX support in gdbstub Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 56/67] Hexagon HVX import instruction encodings Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 57/67] Hexagon HVX import semantics Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 58/67] Hexagon HVX import macro definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 59/67] Hexagon HVX semantics generator Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 60/67] Hexagon HVX instruction decoding Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 61/67] Hexagon HVX instruction utility functions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 62/67] Hexagon HVX macros to interface with the generator Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 63/67] Hexagon HVX macros referenced in instruction semantics Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 64/67] Hexagon HVX helper to commit vector stores (masked and scatter/gather) Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 65/67] Hexagon HVX TCG generation Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 66/67] Hexagon HVX translation Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 67/67] Hexagon HVX build infrastructure Taylor Simpson
2020-03-25 21:13 ` [RFC PATCH v2 00/67] Hexagon patch series Taylor Simpson
2020-04-30 20:53   ` Taylor Simpson

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