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From: Taylor Simpson <tsimpson@quicinc.com>
To: Taylor Simpson <tsimpson@quicinc.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "philmd@redhat.com" <philmd@redhat.com>,
	"riku.voipio@iki.fi" <riku.voipio@iki.fi>,
	"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
	"laurent@vivier.eu" <laurent@vivier.eu>,
	"aleksandar.m.mail@gmail.com" <aleksandar.m.mail@gmail.com>
Subject: RE: [RFC PATCH v2 00/67] Hexagon patch series
Date: Wed, 25 Mar 2020 21:13:31 +0000	[thread overview]
Message-ID: <BYAPR02MB488605B50705C7FD1AD00271DECE0@BYAPR02MB4886.namprd02.prod.outlook.com> (raw)
In-Reply-To: <1582908244-304-1-git-send-email-tsimpson@quicinc.com>

I know everyone is heads-down working on the 5.0 release, and I realize this is a lot of code.  However, I would really appreciate some feedback on it.  Is there anything I can do to make it easier to review?

Thanks,
Taylor


> -----Original Message-----
> From: Taylor Simpson <tsimpson@quicinc.com>
> Sent: Friday, February 28, 2020 10:43 AM
> To: qemu-devel@nongnu.org
> Cc: richard.henderson@linaro.org; philmd@redhat.com; laurent@vivier.eu;
> riku.voipio@iki.fi; aleksandar.m.mail@gmail.com; Taylor Simpson
> <tsimpson@quicinc.com>
> Subject: [RFC PATCH v2 00/67] Hexagon patch series
>
> This series adds support for the Hexagon processor with Linux user support
>
> See patch 02/67 Hexagon README for detailed information.
>
> The patches up to and including "Hexagon build infractructure" implement
> the
> base Hexagon core and the remainder add HVX.  Once the build
> infrastructure
> patch is applied, you can build and qemu will execute non-HVX Hexagon
> programs.
>
> We have a parallel effort to make the Hexagon Linux toolchain publically
> available.
>
>
> *** Testing ***
>
> The port passes the following tests
>     Directed unit tests will contributed when the Hexagon toolchain is available
>     MUSL libc test suite (good coverage of Linux system calls)
>     https://git.musl-libc.org/cgit/libc-testsuite/
>     Internal compiler intrinsics test suite (good coverage of instructions)
>     Hexagon machine learning library unit tests
>     TODO - pull these from the CAF repo
>     make check-tcg TIMEOUT=60
>
> *** Known checkpatch issues ***
>
> The following are known checkpatch errors in the series
>     include/disas/dis-asm.h             space prohibited
>         (Follow convention of other targets on prior lines)
>     target/hexagon/reg_fields.h         Complex macro
>     target/hexagon/attribs.h            Complex macro
>     target/hexagon/decode.c             Complex macro
>     target/hexagon/q6v_decode.c         Macro needs do - while
>     target/hexagon/printinsn.c          Macro needs do - while
>     target/hexagon/gen_semantics.c      Suspicious ; after while (0)
>     target/hexagon/gen_dectree_import.c Complex macro
>     target/hexagon/gen_dectree_import.c Suspicious ; after while (0)
>     target/hexagon/opcodes.c            Complex macro
>     target/hexagon/iclass.h             Complex macro
>     scripts/qemu-binfmt-conf.sh         Line over 90 characters
>     target/hexagon/mmvec/macros.h       Suspicious ; after while (0)
>
> The following are known checkpatch warnings in the series
>     target/hexagon/fma_emu.c            Comments inside macro definition
>     scripts/qemu-binfmt-conf.sh         Line over 80 characters
>
> *** Changes in v2 ***
> - Use scripts/git.orderfile
> - Create a README with the code overview in patch 0001
> - Change #define's in hex_regs.h to an enum
> - Replace hard coded disassembly buffer length (1028) with #define
> - Move Hexagon architecture types patch earlier in series
> - Replace #include standard header files with #include "qemu/osdep.h"
> - Prefix all header file #ifndef's with HEXAGON_
> - Update python version to python3
> - #include "tcg/tcg.h" in genptr_helpers.h
> - Change target/hexagon/Makefile.objs to support out-of-tree build
> - Updated copyright to include year 2020
> - Bug fixes
>     Fix some problems with HEX_DEBUG output
>     Fix bug in circular addressing
> - Optimizations to reduce the amount of TCG code generated
>     Change pred_written from an array to a bit mask
>     Optimize readonly vector registers
>     Conditionally call gen_helper_commit_hvx_stores
>
> Taylor Simpson (67):
>   Hexagon Maintainers
>   Hexagon README
>   Hexagon ELF Machine Definition
>   Hexagon CPU Scalar Core Definition
>   Hexagon register names
>   Hexagon Disassembler
>   Hexagon CPU Scalar Core Helpers
>   Hexagon GDB Stub
>   Hexagon architecture types
>   Hexagon instruction and packet types
>   Hexagon register fields
>   Hexagon instruction attributes
>   Hexagon register map
>   Hexagon instruction/packet decode
>   Hexagon instruction printing
>   Hexagon arch import - instruction semantics definitions
>   Hexagon arch import - macro definitions
>   Hexagon arch import - instruction encoding
>   Hexagon instruction class definitions
>   Hexagon instruction utility functions
>   Hexagon generator phase 1 - C preprocessor for semantics
>   Hexagon generator phase 2 - qemu_def_generated.h
>   Hexagon generator phase 2 - qemu_wrap_generated.h
>   Hexagon generator phase 2 - opcodes_def_generated.h
>   Hexagon generator phase 2 - op_attribs_generated.h
>   Hexagon generator phase 2 - op_regs_generated.h
>   Hexagon generator phase 2 - printinsn-generated.h
>   Hexagon generator phase 3 - C preprocessor for decode tree
>   Hexagon generater phase 4 - Decode tree
>   Hexagon opcode data structures
>   Hexagon macros to interface with the generator
>   Hexagon macros referenced in instruction semantics
>   Hexagon instruction classes
>   Hexagon TCG generation helpers - step 1
>   Hexagon TCG generation helpers - step 2
>   Hexagon TCG generation helpers - step 3
>   Hexagon TCG generation helpers - step 4
>   Hexagon TCG generation helpers - step 5
>   Hexagon TCG generation - step 01
>   Hexagon TCG generation - step 02
>   Hexagon TCG generation - step 03
>   Hexagon TCG generation - step 04
>   Hexagon TCG generation - step 05
>   Hexagon TCG generation - step 06
>   Hexagon TCG generation - step 07
>   Hexagon TCG generation - step 08
>   Hexagon TCG generation - step 09
>   Hexagon TCG generation - step 10
>   Hexagon TCG generation - step 11
>   Hexagon TCG generation - step 12
>   Hexagon translation
>   Hexagon Linux user emulation
>   Hexagon build infrastructure
>   Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition
>   Hexagon HVX support in gdbstub
>   Hexagon HVX import instruction encodings
>   Hexagon HVX import semantics
>   Hexagon HVX import macro definitions
>   Hexagon HVX semantics generator
>   Hexagon HVX instruction decoding
>   Hexagon HVX instruction utility functions
>   Hexagon HVX macros to interface with the generator
>   Hexagon HVX macros referenced in instruction semantics
>   Hexagon HVX helper to commit vector stores (masked and scatter/gather)
>   Hexagon HVX TCG generation
>   Hexagon HVX translation
>   Hexagon HVX build infrastructure
>
>  configure                                    |    9 +
>  default-configs/hexagon-linux-user.mak       |    1 +
>  include/disas/dis-asm.h                      |    1 +
>  include/elf.h                                |    2 +
>  linux-user/hexagon/sockbits.h                |   18 +
>  linux-user/hexagon/syscall_nr.h              |  346 +++
>  linux-user/hexagon/target_cpu.h              |   44 +
>  linux-user/hexagon/target_elf.h              |   38 +
>  linux-user/hexagon/target_fcntl.h            |   18 +
>  linux-user/hexagon/target_signal.h           |   34 +
>  linux-user/hexagon/target_structs.h          |   46 +
>  linux-user/hexagon/target_syscall.h          |   32 +
>  linux-user/hexagon/termbits.h                |   18 +
>  linux-user/syscall_defs.h                    |   33 +
>  target/hexagon/arch.h                        |   62 +
>  target/hexagon/attribs.h                     |   32 +
>  target/hexagon/attribs_def.h                 |  404 +++
>  target/hexagon/conv_emu.h                    |   50 +
>  target/hexagon/cpu-param.h                   |   26 +
>  target/hexagon/cpu.h                         |  207 ++
>  target/hexagon/cpu_bits.h                    |   37 +
>  target/hexagon/decode.h                      |   39 +
>  target/hexagon/fma_emu.h                     |   30 +
>  target/hexagon/genptr.h                      |   25 +
>  target/hexagon/genptr_helpers.h              | 1049 +++++++
>  target/hexagon/helper.h                      |   38 +
>  target/hexagon/helper_overrides.h            | 1850 ++++++++++++
>  target/hexagon/hex_arch_types.h              |   42 +
>  target/hexagon/hex_regs.h                    |   99 +
>  target/hexagon/iclass.h                      |   46 +
>  target/hexagon/insn.h                        |  149 +
>  target/hexagon/internal.h                    |   54 +
>  target/hexagon/macros.h                      | 1474 ++++++++++
>  target/hexagon/mmvec/decode_ext_mmvec.h      |   24 +
>  target/hexagon/mmvec/macros.h                |  698 +++++
>  target/hexagon/mmvec/mmvec.h                 |   87 +
>  target/hexagon/mmvec/system_ext_mmvec.h      |   38 +
>  target/hexagon/opcodes.h                     |   67 +
>  target/hexagon/printinsn.h                   |   26 +
>  target/hexagon/reg_fields.h                  |   40 +
>  target/hexagon/reg_fields_def.h              |  109 +
>  target/hexagon/regmap.h                      |   38 +
>  target/hexagon/translate.h                   |  112 +
>  disas/hexagon.c                              |   62 +
>  linux-user/elfload.c                         |   16 +
>  linux-user/hexagon/cpu_loop.c                |  173 ++
>  linux-user/hexagon/signal.c                  |  276 ++
>  linux-user/syscall.c                         |    2 +
>  target/hexagon/arch.c                        |  663 +++++
>  target/hexagon/conv_emu.c                    |  369 +++
>  target/hexagon/cpu.c                         |  374 +++
>  target/hexagon/decode.c                      |  788 +++++
>  target/hexagon/fma_emu.c                     |  916 ++++++
>  target/hexagon/gdbstub.c                     |  111 +
>  target/hexagon/gen_dectree_import.c          |  205 ++
>  target/hexagon/gen_semantics.c               |  101 +
>  target/hexagon/genptr.c                      |   61 +
>  target/hexagon/iclass.c                      |  107 +
>  target/hexagon/mmvec/decode_ext_mmvec.c      |  670 +++++
>  target/hexagon/mmvec/system_ext_mmvec.c      |  263 ++
>  target/hexagon/op_helper.c                   |  509 ++++
>  target/hexagon/opcodes.c                     |  217 ++
>  target/hexagon/printinsn.c                   |   91 +
>  target/hexagon/q6v_decode.c                  |  416 +++
>  target/hexagon/reg_fields.c                  |   28 +
>  target/hexagon/translate.c                   |  916 ++++++
>  MAINTAINERS                                  |    8 +
>  disas/Makefile.objs                          |    1 +
>  scripts/qemu-binfmt-conf.sh                  |    6 +-
>  target/hexagon/Makefile.objs                 |  127 +
>  target/hexagon/README                        |  296 ++
>  target/hexagon/dectree.py                    |  353 +++
>  target/hexagon/do_qemu.py                    | 1194 ++++++++
>  target/hexagon/imported/allext.idef          |   25 +
>  target/hexagon/imported/allext_macros.def    |   25 +
>  target/hexagon/imported/allextenc.def        |   20 +
>  target/hexagon/imported/allidefs.def         |   92 +
>  target/hexagon/imported/alu.idef             | 1335 +++++++++
>  target/hexagon/imported/branch.idef          |  344 +++
>  target/hexagon/imported/compare.idef         |  639 +++++
>  target/hexagon/imported/encode.def           |  126 +
>  target/hexagon/imported/encode_pp.def        | 2283 +++++++++++++++
>  target/hexagon/imported/encode_subinsn.def   |  150 +
>  target/hexagon/imported/float.idef           |  498 ++++
>  target/hexagon/imported/iclass.def           |   52 +
>  target/hexagon/imported/ldst.idef            |  421 +++
>  target/hexagon/imported/macros.def           | 3970
> ++++++++++++++++++++++++++
>  target/hexagon/imported/mmvec/encode_ext.def |  830 ++++++
>  target/hexagon/imported/mmvec/ext.idef       | 2780
> ++++++++++++++++++
>  target/hexagon/imported/mmvec/macros.def     | 1110 +++++++
>  target/hexagon/imported/mpy.idef             | 1269 ++++++++
>  target/hexagon/imported/shift.idef           | 1211 ++++++++
>  target/hexagon/imported/subinsns.idef        |  152 +
>  target/hexagon/imported/system.idef          |  302 ++
>  tests/tcg/configure.sh                       |    4 +-
>  tests/tcg/hexagon/float_convs.ref            |  748 +++++
>  tests/tcg/hexagon/float_madds.ref            |  768 +++++
>  97 files changed, 36063 insertions(+), 2 deletions(-)
>  create mode 100644 default-configs/hexagon-linux-user.mak
>  create mode 100644 linux-user/hexagon/sockbits.h
>  create mode 100644 linux-user/hexagon/syscall_nr.h
>  create mode 100644 linux-user/hexagon/target_cpu.h
>  create mode 100644 linux-user/hexagon/target_elf.h
>  create mode 100644 linux-user/hexagon/target_fcntl.h
>  create mode 100644 linux-user/hexagon/target_signal.h
>  create mode 100644 linux-user/hexagon/target_structs.h
>  create mode 100644 linux-user/hexagon/target_syscall.h
>  create mode 100644 linux-user/hexagon/termbits.h
>  create mode 100644 target/hexagon/arch.h
>  create mode 100644 target/hexagon/attribs.h
>  create mode 100644 target/hexagon/attribs_def.h
>  create mode 100644 target/hexagon/conv_emu.h
>  create mode 100644 target/hexagon/cpu-param.h
>  create mode 100644 target/hexagon/cpu.h
>  create mode 100644 target/hexagon/cpu_bits.h
>  create mode 100644 target/hexagon/decode.h
>  create mode 100644 target/hexagon/fma_emu.h
>  create mode 100644 target/hexagon/genptr.h
>  create mode 100644 target/hexagon/genptr_helpers.h
>  create mode 100644 target/hexagon/helper.h
>  create mode 100644 target/hexagon/helper_overrides.h
>  create mode 100644 target/hexagon/hex_arch_types.h
>  create mode 100644 target/hexagon/hex_regs.h
>  create mode 100644 target/hexagon/iclass.h
>  create mode 100644 target/hexagon/insn.h
>  create mode 100644 target/hexagon/internal.h
>  create mode 100644 target/hexagon/macros.h
>  create mode 100644 target/hexagon/mmvec/decode_ext_mmvec.h
>  create mode 100644 target/hexagon/mmvec/macros.h
>  create mode 100644 target/hexagon/mmvec/mmvec.h
>  create mode 100644 target/hexagon/mmvec/system_ext_mmvec.h
>  create mode 100644 target/hexagon/opcodes.h
>  create mode 100644 target/hexagon/printinsn.h
>  create mode 100644 target/hexagon/reg_fields.h
>  create mode 100644 target/hexagon/reg_fields_def.h
>  create mode 100644 target/hexagon/regmap.h
>  create mode 100644 target/hexagon/translate.h
>  create mode 100644 disas/hexagon.c
>  create mode 100644 linux-user/hexagon/cpu_loop.c
>  create mode 100644 linux-user/hexagon/signal.c
>  create mode 100644 target/hexagon/arch.c
>  create mode 100644 target/hexagon/conv_emu.c
>  create mode 100644 target/hexagon/cpu.c
>  create mode 100644 target/hexagon/decode.c
>  create mode 100644 target/hexagon/fma_emu.c
>  create mode 100644 target/hexagon/gdbstub.c
>  create mode 100644 target/hexagon/gen_dectree_import.c
>  create mode 100644 target/hexagon/gen_semantics.c
>  create mode 100644 target/hexagon/genptr.c
>  create mode 100644 target/hexagon/iclass.c
>  create mode 100644 target/hexagon/mmvec/decode_ext_mmvec.c
>  create mode 100644 target/hexagon/mmvec/system_ext_mmvec.c
>  create mode 100644 target/hexagon/op_helper.c
>  create mode 100644 target/hexagon/opcodes.c
>  create mode 100644 target/hexagon/printinsn.c
>  create mode 100644 target/hexagon/q6v_decode.c
>  create mode 100644 target/hexagon/reg_fields.c
>  create mode 100644 target/hexagon/translate.c
>  create mode 100644 target/hexagon/Makefile.objs
>  create mode 100644 target/hexagon/README
>  create mode 100755 target/hexagon/dectree.py
>  create mode 100755 target/hexagon/do_qemu.py
>  create mode 100644 target/hexagon/imported/allext.idef
>  create mode 100644 target/hexagon/imported/allext_macros.def
>  create mode 100644 target/hexagon/imported/allextenc.def
>  create mode 100644 target/hexagon/imported/allidefs.def
>  create mode 100644 target/hexagon/imported/alu.idef
>  create mode 100644 target/hexagon/imported/branch.idef
>  create mode 100644 target/hexagon/imported/compare.idef
>  create mode 100644 target/hexagon/imported/encode.def
>  create mode 100644 target/hexagon/imported/encode_pp.def
>  create mode 100644 target/hexagon/imported/encode_subinsn.def
>  create mode 100644 target/hexagon/imported/float.idef
>  create mode 100644 target/hexagon/imported/iclass.def
>  create mode 100644 target/hexagon/imported/ldst.idef
>  create mode 100755 target/hexagon/imported/macros.def
>  create mode 100644 target/hexagon/imported/mmvec/encode_ext.def
>  create mode 100644 target/hexagon/imported/mmvec/ext.idef
>  create mode 100755 target/hexagon/imported/mmvec/macros.def
>  create mode 100644 target/hexagon/imported/mpy.idef
>  create mode 100644 target/hexagon/imported/shift.idef
>  create mode 100644 target/hexagon/imported/subinsns.idef
>  create mode 100644 target/hexagon/imported/system.idef
>  create mode 100644 tests/tcg/hexagon/float_convs.ref
>  create mode 100644 tests/tcg/hexagon/float_madds.ref
>
> --
> 2.7.4


  parent reply	other threads:[~2020-03-25 21:14 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-28 16:42 [RFC PATCH v2 00/67] Hexagon patch series Taylor Simpson
2020-02-28 16:42 ` [RFC PATCH v2 01/67] Hexagon Maintainers Taylor Simpson
2020-02-28 16:42 ` [RFC PATCH v2 02/67] Hexagon README Taylor Simpson
2020-02-28 16:42 ` [RFC PATCH v2 03/67] Hexagon ELF Machine Definition Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 04/67] Hexagon CPU Scalar Core Definition Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 05/67] Hexagon register names Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 06/67] Hexagon Disassembler Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 07/67] Hexagon CPU Scalar Core Helpers Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 08/67] Hexagon GDB Stub Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 09/67] Hexagon architecture types Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 10/67] Hexagon instruction and packet types Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 11/67] Hexagon register fields Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 12/67] Hexagon instruction attributes Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 13/67] Hexagon register map Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 14/67] Hexagon instruction/packet decode Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 15/67] Hexagon instruction printing Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 16/67] Hexagon arch import - instruction semantics definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 17/67] Hexagon arch import - macro definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 18/67] Hexagon arch import - instruction encoding Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 19/67] Hexagon instruction class definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 20/67] Hexagon instruction utility functions Taylor Simpson
2020-04-09 18:53   ` Brian Cain
2020-04-09 20:22     ` Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 21/67] Hexagon generator phase 1 - C preprocessor for semantics Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 22/67] Hexagon generator phase 2 - qemu_def_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 23/67] Hexagon generator phase 2 - qemu_wrap_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 24/67] Hexagon generator phase 2 - opcodes_def_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 25/67] Hexagon generator phase 2 - op_attribs_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 26/67] Hexagon generator phase 2 - op_regs_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 27/67] Hexagon generator phase 2 - printinsn-generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 28/67] Hexagon generator phase 3 - C preprocessor for decode tree Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 29/67] Hexagon generater phase 4 - Decode tree Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 30/67] Hexagon opcode data structures Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 31/67] Hexagon macros to interface with the generator Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 32/67] Hexagon macros referenced in instruction semantics Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 33/67] Hexagon instruction classes Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 34/67] Hexagon TCG generation helpers - step 1 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 35/67] Hexagon TCG generation helpers - step 2 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 36/67] Hexagon TCG generation helpers - step 3 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 37/67] Hexagon TCG generation helpers - step 4 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 38/67] Hexagon TCG generation helpers - step 5 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 39/67] Hexagon TCG generation - step 01 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 40/67] Hexagon TCG generation - step 02 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 41/67] Hexagon TCG generation - step 03 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 42/67] Hexagon TCG generation - step 04 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 43/67] Hexagon TCG generation - step 05 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 44/67] Hexagon TCG generation - step 06 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 45/67] Hexagon TCG generation - step 07 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 46/67] Hexagon TCG generation - step 08 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 47/67] Hexagon TCG generation - step 09 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 48/67] Hexagon TCG generation - step 10 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 49/67] Hexagon TCG generation - step 11 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 50/67] Hexagon TCG generation - step 12 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 51/67] Hexagon translation Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 52/67] Hexagon Linux user emulation Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 53/67] Hexagon build infrastructure Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 54/67] Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 55/67] Hexagon HVX support in gdbstub Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 56/67] Hexagon HVX import instruction encodings Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 57/67] Hexagon HVX import semantics Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 58/67] Hexagon HVX import macro definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 59/67] Hexagon HVX semantics generator Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 60/67] Hexagon HVX instruction decoding Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 61/67] Hexagon HVX instruction utility functions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 62/67] Hexagon HVX macros to interface with the generator Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 63/67] Hexagon HVX macros referenced in instruction semantics Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 64/67] Hexagon HVX helper to commit vector stores (masked and scatter/gather) Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 65/67] Hexagon HVX TCG generation Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 66/67] Hexagon HVX translation Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 67/67] Hexagon HVX build infrastructure Taylor Simpson
2020-03-25 21:13 ` Taylor Simpson [this message]
2020-04-30 20:53   ` [RFC PATCH v2 00/67] Hexagon patch series Taylor Simpson

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