From: Douglas Anderson <dianders@chromium.org> To: ulf.hansson@linaro.org, kishon@ti.com, Heiko Stuebner <heiko@sntech.de>, robh+dt@kernel.org Cc: shawn.lin@rock-chips.com, xzy.xu@rock-chips.com, briannorris@chromium.org, adrian.hunter@intel.com, linux-rockchip@lists.infradead.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Douglas Anderson <dianders@chromium.org>, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, catalin.marinas@arm.com, will.deacon@arm.com, jay.xu@rock-chips.com, wxt@rock-chips.com, zhengxing@rock-chips.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Date: Tue, 7 Jun 2016 15:44:38 -0700 [thread overview] Message-ID: <1465339484-969-6-git-send-email-dianders@chromium.org> (raw) In-Reply-To: <1465339484-969-1-git-send-email-dianders@chromium.org> On rk3399 we'd like to be able to properly set corecfg registers in the Arasan SDHCI component. Specify the syscon to enable that. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index a4383f359264..1b57e92e0093 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -220,6 +220,7 @@ compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; reg = <0x0 0xfe330000 0x0 0x10000>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + arasan,soc-ctl-syscon = <&grf>; assigned-clocks = <&cru SCLK_EMMC>; assigned-clock-rates = <200000000>; clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>; -- 2.8.0.rc3.226.g39d4020
WARNING: multiple messages have this Message-ID (diff)
From: dianders@chromium.org (Douglas Anderson) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Date: Tue, 7 Jun 2016 15:44:38 -0700 [thread overview] Message-ID: <1465339484-969-6-git-send-email-dianders@chromium.org> (raw) In-Reply-To: <1465339484-969-1-git-send-email-dianders@chromium.org> On rk3399 we'd like to be able to properly set corecfg registers in the Arasan SDHCI component. Specify the syscon to enable that. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index a4383f359264..1b57e92e0093 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -220,6 +220,7 @@ compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; reg = <0x0 0xfe330000 0x0 0x10000>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + arasan,soc-ctl-syscon = <&grf>; assigned-clocks = <&cru SCLK_EMMC>; assigned-clock-rates = <200000000>; clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>; -- 2.8.0.rc3.226.g39d4020
next prev parent reply other threads:[~2016-06-07 22:45 UTC|newest] Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-07 22:44 [PATCH 0/11] Changes to support 150 MHz eMMC on rk3399 Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-07 22:44 ` [PATCH 01/11] phy: rockchip-emmc: Increase lock time allowance Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-13 7:58 ` Shawn Lin 2016-06-13 7:58 ` Shawn Lin 2016-06-13 7:58 ` Shawn Lin 2016-06-13 23:07 ` Doug Anderson 2016-06-13 23:07 ` Doug Anderson 2016-06-13 23:07 ` Doug Anderson 2016-06-07 22:44 ` [PATCH 02/11] mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-13 8:08 ` Shawn Lin 2016-06-13 8:08 ` Shawn Lin 2016-06-13 8:08 ` Shawn Lin 2016-06-13 23:06 ` Doug Anderson 2016-06-13 23:06 ` Doug Anderson 2016-06-13 23:06 ` Doug Anderson 2016-06-07 22:44 ` [PATCH 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-08 20:17 ` Rob Herring 2016-06-13 8:18 ` Shawn Lin 2016-06-13 9:32 ` Heiko Stübner 2016-06-13 9:32 ` Heiko Stübner 2016-06-13 23:07 ` Doug Anderson 2016-06-07 22:44 ` [PATCH 04/11] mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3399 Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-13 8:36 ` Shawn Lin 2016-06-13 8:36 ` Shawn Lin 2016-06-13 23:06 ` Doug Anderson 2016-06-13 23:06 ` Doug Anderson 2016-06-13 23:06 ` Doug Anderson 2016-06-14 0:14 ` Shawn Lin 2016-06-14 0:14 ` Shawn Lin 2016-06-14 0:14 ` Shawn Lin 2016-06-14 0:43 ` Doug Anderson 2016-06-14 0:43 ` Doug Anderson 2016-06-14 0:43 ` Doug Anderson 2016-06-14 0:59 ` Shawn Lin 2016-06-14 0:59 ` Shawn Lin 2016-06-14 0:59 ` Shawn Lin 2016-06-14 2:13 ` Doug Anderson 2016-06-14 2:13 ` Doug Anderson 2016-06-14 2:13 ` Doug Anderson 2016-06-16 1:06 ` Shawn Lin 2016-06-16 1:06 ` Shawn Lin 2016-06-16 1:06 ` Shawn Lin 2016-06-07 22:44 ` Douglas Anderson [this message] 2016-06-07 22:44 ` [PATCH 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Douglas Anderson 2016-06-07 22:44 ` [PATCH 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock Douglas Anderson 2016-06-08 20:19 ` Rob Herring 2016-06-08 20:52 ` Doug Anderson 2016-06-08 20:52 ` Doug Anderson 2016-06-10 13:10 ` Rob Herring 2016-06-13 23:05 ` Doug Anderson 2016-06-07 22:44 ` [PATCH 07/11] " Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-07 22:44 ` [PATCH 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported " Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-10 13:36 ` Rob Herring 2016-06-10 13:36 ` Rob Herring 2016-06-13 23:05 ` Doug Anderson 2016-06-13 23:05 ` Doug Anderson 2016-06-13 23:05 ` Doug Anderson 2016-06-07 22:44 ` [PATCH 09/11] phy: rockchip-emmc: Set phyctrl_frqsel based on " Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-13 8:54 ` Shawn Lin 2016-06-13 8:54 ` Shawn Lin 2016-06-13 8:54 ` Shawn Lin 2016-06-13 23:05 ` Doug Anderson 2016-06-13 23:05 ` Doug Anderson 2016-06-13 23:05 ` Doug Anderson 2016-06-13 23:05 ` Doug Anderson 2016-06-14 0:24 ` Shawn Lin 2016-06-14 0:24 ` Shawn Lin 2016-06-14 0:24 ` Shawn Lin 2016-06-14 0:45 ` Doug Anderson 2016-06-14 0:45 ` Doug Anderson 2016-06-14 0:45 ` Doug Anderson 2016-06-07 22:44 ` [PATCH 10/11] phy: rockchip-emmc: Minor code cleanup in rockchip_emmc_phy_power_off() Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson 2016-06-13 8:56 ` Shawn Lin 2016-06-13 8:56 ` Shawn Lin 2016-06-13 23:05 ` Doug Anderson 2016-06-13 23:05 ` Doug Anderson 2016-06-13 23:05 ` Doug Anderson 2016-06-07 22:44 ` [PATCH 11/11] arm64: dts: rockchip: Provide emmcclk to PHY for rk3399 Douglas Anderson 2016-06-07 22:44 ` Douglas Anderson
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1465339484-969-6-git-send-email-dianders@chromium.org \ --to=dianders@chromium.org \ --cc=adrian.hunter@intel.com \ --cc=briannorris@chromium.org \ --cc=catalin.marinas@arm.com \ --cc=devicetree@vger.kernel.org \ --cc=galak@codeaurora.org \ --cc=heiko@sntech.de \ --cc=ijc+devicetree@hellion.org.uk \ --cc=jay.xu@rock-chips.com \ --cc=kishon@ti.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mmc@vger.kernel.org \ --cc=linux-rockchip@lists.infradead.org \ --cc=mark.rutland@arm.com \ --cc=pawel.moll@arm.com \ --cc=robh+dt@kernel.org \ --cc=shawn.lin@rock-chips.com \ --cc=ulf.hansson@linaro.org \ --cc=will.deacon@arm.com \ --cc=wxt@rock-chips.com \ --cc=xzy.xu@rock-chips.com \ --cc=zhengxing@rock-chips.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.