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From: Chris Wilson <chris@chris-wilson.co.uk>
To: Oscar Mateo <oscar.mateo@intel.com>,
	Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	Mika Kuoppala <mika.kuoppala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org,
	Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 05/20] drm/i915/icl: Interrupt handling
Date: Tue, 13 Feb 2018 22:02:26 +0000	[thread overview]
Message-ID: <151855934632.31524.10852028459060113134@mail.alporthouse.com> (raw)
In-Reply-To: <fb64c23f-2760-f90f-03a9-7ffe7d2167a3@intel.com>

Quoting Oscar Mateo (2018-02-13 21:56:32)
> 
> 
> On 02/13/2018 11:18 AM, Daniele Ceraolo Spurio wrote:
> >
> >
> > On 13/02/18 08:37, Mika Kuoppala wrote:
> >> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >> +static irqreturn_t
> >> +gen11_gt_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
> >> +{
> >> +    irqreturn_t ret = IRQ_NONE;
> >> +    u16 irq[2][32];
> >> +    u32 dw, ident;
> >> +    unsigned long tmp;
> >> +    unsigned int bank, bit, engine;
> >> +    unsigned long wait_start, wait_end;
> >> +
> >> +    memset(irq, 0, sizeof(irq));
> >> +
> >> +    for (bank = 0; bank < 2; bank++) {
> >> +        if (master_ctl & GEN11_GT_DW_IRQ(bank)) {
> >> +            dw = I915_READ_FW(GEN11_GT_INTR_DW(bank));
> >> +            if (!dw)
> >> +                DRM_ERROR("GT_INTR_DW%u blank!\n", bank);
> >> +            tmp = dw;
> >> +            for_each_set_bit(bit, &tmp, 32) {
> >> +                I915_WRITE_FW(GEN11_IIR_REG_SELECTOR(bank), 1 << bit);
> >> +                wait_start = local_clock() >> 10;
> >> +                /* NB: Specs do not specify how long to spin wait.
> >> +                 * Taking 100us as an educated guess */
> >> +                wait_end = wait_start + 100;
> >> +                do {
> >> +                    ident = 
> >> I915_READ_FW(GEN11_INTR_IDENTITY_REG(bank));
> >> +                } while (!(ident & GEN11_INTR_DATA_VALID) &&
> >> +                     !time_after((unsigned long)local_clock() >> 10, 
> >> wait_end));
> >
> > Patch 18/20 changes this to time_after64 and wait_end to u64, which 
> > looks like the correct way to handle this. Since splitting part of 
> > this loop out also helps making things cleaner, would it make sense to 
> > squash patch 18/20 into this one?
> >
> 
> Makes sense to me. Tvrtko, what do you think?

The squash should be made, but time_after64 is no more correct since the
native 32b/64b wrapped arithmetic is accurate. So what can be done here
is remove the casts and use time_after32() if we truly cared.
-Chris
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  reply	other threads:[~2018-02-13 22:02 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-13 16:37 [PATCH 00/20] ICL GEM enabling (v2) Mika Kuoppala
2018-02-13 16:37 ` [PATCH 01/20] drm/i915/icl: Add the ICL PCI IDs Mika Kuoppala
2018-02-13 17:38   ` Michel Thierry
2018-02-13 18:48   ` Anuj Phogat
2018-02-13 16:37 ` [PATCH 02/20] drm/i915/icl: add icelake_init_clock_gating() Mika Kuoppala
2018-02-13 16:37 ` [PATCH 03/20] drm/i915/icl: Show interrupt registers in debugfs Mika Kuoppala
2018-02-13 19:44   ` Daniele Ceraolo Spurio
2018-02-14  9:55     ` Mika Kuoppala
2018-02-14 11:08   ` Mika Kuoppala
2018-02-13 16:37 ` [PATCH 04/20] drm/i915/icl: Prepare for more rings Mika Kuoppala
2018-02-13 16:37 ` [PATCH 05/20] drm/i915/icl: Interrupt handling Mika Kuoppala
2018-02-13 17:06   ` Chris Wilson
2018-02-13 19:18   ` Daniele Ceraolo Spurio
2018-02-13 21:56     ` Oscar Mateo
2018-02-13 22:02       ` Chris Wilson [this message]
2018-02-14 13:37   ` Mika Kuoppala
2018-02-14 14:12   ` [PATCH 05/19] " Mika Kuoppala
2018-02-14 14:25     ` Chris Wilson
2018-02-15 16:24       ` Mika Kuoppala
2018-02-15 16:27     ` Mika Kuoppala
2018-02-15 16:35       ` Tvrtko Ursulin
2018-02-15 17:59       ` Daniele Ceraolo Spurio
2018-02-13 16:37 ` [PATCH 06/20] drm/i915/icl: Ringbuffer interrupt handling Mika Kuoppala
2018-02-13 18:44   ` Daniele Ceraolo Spurio
2018-02-13 16:37 ` [PATCH 07/20] drm/i915/icl: Correctly initialize the Gen11 engines Mika Kuoppala
2018-02-13 16:37 ` [PATCH 08/20] drm/i915/icl: new context descriptor support Mika Kuoppala
2018-02-14 23:34   ` [PATCH v5] " Daniele Ceraolo Spurio
2018-02-13 16:37 ` [PATCH 09/20] drm/i915/icl: Enhanced execution list support Mika Kuoppala
2018-02-13 16:37 ` [PATCH 10/20] drm/i915/icl: Add Indirect Context Offset for Gen11 Mika Kuoppala
2018-02-13 16:37 ` [PATCH 11/20] drm/i915/icl: Gen11 forcewake support Mika Kuoppala
2018-02-13 16:37 ` [PATCH 12/20] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances Mika Kuoppala
2018-02-13 17:13   ` Michal Wajdeczko
2018-02-17  8:51   ` Sagar Arun Kamble
2018-02-17  9:04     ` Chris Wilson
2018-02-17 12:10       ` Sagar Arun Kamble
2018-02-17 12:18         ` Chris Wilson
2018-02-17 14:17           ` Sagar Arun Kamble
2018-02-20 19:16             ` Daniele Ceraolo Spurio
2018-02-21 23:35             ` [PATCH v9] " Oscar Mateo
2018-02-22  6:17               ` Sagar Arun Kamble
2018-02-22 23:05                 ` Oscar Mateo
2018-02-26  5:22                   ` Sagar Arun Kamble
2018-02-26 23:04                     ` Oscar Mateo
2018-02-27  5:49                       ` Sagar Arun Kamble
2018-02-28 17:59                         ` Oscar Mateo
2018-03-01  5:07                           ` Sagar Arun Kamble
2018-02-23  2:21               ` kbuild test robot
2018-02-23  3:03               ` kbuild test robot
2018-02-13 16:37 ` [PATCH 13/20] drm/i915/icl: Enable the extra video decode and enhancement boxes for Icelake 11 Mika Kuoppala
2018-02-13 18:05   ` Michel Thierry
2018-02-13 16:37 ` [PATCH 14/20] drm/i915/icl: Update subslice define for ICL 11 Mika Kuoppala
2018-02-13 16:37 ` [PATCH 15/20] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection Mika Kuoppala
2018-02-13 18:27   ` Lionel Landwerlin
2018-02-13 16:37 ` [PATCH 16/20] drm/i915/icl: Add reset control register changes Mika Kuoppala
2018-02-13 16:37 ` [PATCH 17/20] drm/i915/icl: Add configuring MOCS in new Icelake engines Mika Kuoppala
2018-02-13 18:13   ` Michel Thierry
2018-02-13 16:37 ` [PATCH 18/20] drm/i915/icl: Split out the servicing of the Selector and Shared IIR registers Mika Kuoppala
2018-02-13 16:37 ` [PATCH 19/20] drm/i915/icl: Handle RPS interrupts correctly for Gen11 Mika Kuoppala
2018-02-13 16:37 ` [PATCH 20/20] drm/i915/icl: Enable RC6 and RPS in Gen11 Mika Kuoppala
2018-02-13 17:34 ` ✓ Fi.CI.BAT: success for ICL GEM enabling (v2) Patchwork
2018-02-13 21:36 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-02-14 13:30 ` ✗ Fi.CI.CHECKPATCH: warning for ICL GEM enabling (v2) (rev2) Patchwork
2018-02-14 13:44 ` ✓ Fi.CI.BAT: success " Patchwork
2018-02-14 23:41 ` ✗ Fi.CI.BAT: failure for ICL GEM enabling (v2) (rev4) Patchwork
2018-02-15 17:01 ` ✗ Fi.CI.BAT: failure for ICL GEM enabling (v2) (rev5) Patchwork
2018-02-21 23:59 ` ✗ Fi.CI.BAT: failure for ICL GEM enabling (v2) (rev6) Patchwork

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