From: Jan Kara <jack@suse.cz> To: Dan Williams <dan.j.williams@intel.com> Cc: Jan Kara <jack@suse.cz>, Matthew Wilcox <mawilcox@microsoft.com>, x86@kernel.org, linux-kernel@vger.kernel.org, linux-nvdimm@lists.01.org, dm-devel@redhat.com, Ingo Molnar <mingo@redhat.com>, viro@zeniv.linux.org.uk, "H. Peter Anvin" <hpa@zytor.com>, linux-fsdevel@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>, hch@lst.de Subject: Re: [PATCH v3 08/14] x86, dax, libnvdimm: move wb_cache_pmem() to libnvdimm Date: Wed, 14 Jun 2017 12:54:25 +0200 [thread overview] Message-ID: <20170614105425.GD21506@quack2.suse.cz> (raw) In-Reply-To: <149703986971.20620.10303247412197996310.stgit@dwillia2-desk3.amr.corp.intel.com> On Fri 09-06-17 13:24:29, Dan Williams wrote: > With all calls to this routine re-directed through the pmem driver, we can kill > the pmem api indirection. arch_wb_cache_pmem() is now optionally supplied by > the arch specific asm/pmem.h. Same as before, pmem flushing is only defined > for x86_64, but it is straightforward to add other archs in the future. > > Cc: <x86@kernel.org> > Cc: Jan Kara <jack@suse.cz> > Cc: Jeff Moyer <jmoyer@redhat.com> > Cc: Ingo Molnar <mingo@redhat.com> > Cc: Christoph Hellwig <hch@lst.de> > Cc: "H. Peter Anvin" <hpa@zytor.com> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: Oliver O'Halloran <oohall@gmail.com> > Cc: Matthew Wilcox <mawilcox@microsoft.com> > Cc: Ross Zwisler <ross.zwisler@linux.intel.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com> Looks good to me. Just one question below... > -/** > - * arch_wb_cache_pmem - write back a cache range with CLWB > - * @vaddr: virtual start address > - * @size: number of bytes to write back > - * > - * Write back a cache range using the CLWB (cache line write back) > - * instruction. Note that @size is internally rounded up to be cache > - * line size aligned. > - */ > static inline void arch_wb_cache_pmem(void *addr, size_t size) > { > - u16 x86_clflush_size = boot_cpu_data.x86_clflush_size; > - unsigned long clflush_mask = x86_clflush_size - 1; > - void *vend = addr + size; > - void *p; > - > - for (p = (void *)((unsigned long)addr & ~clflush_mask); > - p < vend; p += x86_clflush_size) > - clwb(p); > + clean_cache_range(addr,size); > } So this will make compilation break on 32-bit x86 as it does not define clean_cache_range(). Do we somewhere force we are on x86_64 when pmem is enabled? Honza -- Jan Kara <jack@suse.com> SUSE Labs, CR _______________________________________________ Linux-nvdimm mailing list Linux-nvdimm@lists.01.org https://lists.01.org/mailman/listinfo/linux-nvdimm
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From: Jan Kara <jack@suse.cz> To: Dan Williams <dan.j.williams@intel.com> Cc: linux-nvdimm@lists.01.org, Jan Kara <jack@suse.cz>, dm-devel@redhat.com, Matthew Wilcox <mawilcox@microsoft.com>, x86@kernel.org, linux-kernel@vger.kernel.org, hch@lst.de, Jeff Moyer <jmoyer@redhat.com>, Ingo Molnar <mingo@redhat.com>, "Oliver O'Halloran" <oohall@gmail.com>, viro@zeniv.linux.org.uk, "H. Peter Anvin" <hpa@zytor.com>, linux-fsdevel@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>, Ross Zwisler <ross.zwisler@linux.intel.com> Subject: Re: [PATCH v3 08/14] x86, dax, libnvdimm: move wb_cache_pmem() to libnvdimm Date: Wed, 14 Jun 2017 12:54:25 +0200 [thread overview] Message-ID: <20170614105425.GD21506@quack2.suse.cz> (raw) In-Reply-To: <149703986971.20620.10303247412197996310.stgit@dwillia2-desk3.amr.corp.intel.com> On Fri 09-06-17 13:24:29, Dan Williams wrote: > With all calls to this routine re-directed through the pmem driver, we can kill > the pmem api indirection. arch_wb_cache_pmem() is now optionally supplied by > the arch specific asm/pmem.h. Same as before, pmem flushing is only defined > for x86_64, but it is straightforward to add other archs in the future. > > Cc: <x86@kernel.org> > Cc: Jan Kara <jack@suse.cz> > Cc: Jeff Moyer <jmoyer@redhat.com> > Cc: Ingo Molnar <mingo@redhat.com> > Cc: Christoph Hellwig <hch@lst.de> > Cc: "H. Peter Anvin" <hpa@zytor.com> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: Oliver O'Halloran <oohall@gmail.com> > Cc: Matthew Wilcox <mawilcox@microsoft.com> > Cc: Ross Zwisler <ross.zwisler@linux.intel.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com> Looks good to me. Just one question below... > -/** > - * arch_wb_cache_pmem - write back a cache range with CLWB > - * @vaddr: virtual start address > - * @size: number of bytes to write back > - * > - * Write back a cache range using the CLWB (cache line write back) > - * instruction. Note that @size is internally rounded up to be cache > - * line size aligned. > - */ > static inline void arch_wb_cache_pmem(void *addr, size_t size) > { > - u16 x86_clflush_size = boot_cpu_data.x86_clflush_size; > - unsigned long clflush_mask = x86_clflush_size - 1; > - void *vend = addr + size; > - void *p; > - > - for (p = (void *)((unsigned long)addr & ~clflush_mask); > - p < vend; p += x86_clflush_size) > - clwb(p); > + clean_cache_range(addr,size); > } So this will make compilation break on 32-bit x86 as it does not define clean_cache_range(). Do we somewhere force we are on x86_64 when pmem is enabled? Honza -- Jan Kara <jack@suse.com> SUSE Labs, CR
next prev parent reply other threads:[~2017-06-14 10:53 UTC|newest] Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-06-09 20:23 [PATCH v3 00/14] pmem: stop abusing __copy_user_nocache(), and other reworks Dan Williams 2017-06-09 20:23 ` Dan Williams 2017-06-09 20:23 ` Dan Williams 2017-06-09 20:23 ` [PATCH v3 01/14] x86, uaccess: introduce copy_from_iter_flushcache for pmem / cache-bypass operations Dan Williams 2017-06-09 20:23 ` Dan Williams 2017-06-09 20:23 ` Dan Williams 2017-06-18 8:28 ` Christoph Hellwig 2017-06-18 8:28 ` Christoph Hellwig 2017-06-18 8:28 ` Christoph Hellwig 2017-06-19 2:02 ` Dan Williams 2017-06-19 2:02 ` Dan Williams 2017-06-19 2:02 ` Dan Williams 2017-06-09 20:23 ` [PATCH v3 02/14] dm: add ->copy_from_iter() dax operation support Dan Williams 2017-06-09 20:23 ` Dan Williams 2017-06-09 20:23 ` Dan Williams 2017-06-15 0:46 ` Kani, Toshimitsu 2017-06-15 0:46 ` Kani, Toshimitsu 2017-06-15 0:46 ` Kani, Toshimitsu 2017-06-15 1:21 ` Kani, Toshimitsu 2017-06-15 1:21 ` Kani, Toshimitsu 2017-06-18 8:37 ` Christoph Hellwig 2017-06-18 8:37 ` Christoph Hellwig 2017-06-18 8:37 ` Christoph Hellwig 2017-06-19 2:04 ` Dan Williams 2017-06-19 2:04 ` Dan Williams 2017-06-19 2:04 ` Dan Williams 2017-06-09 20:24 ` [PATCH v3 03/14] filesystem-dax: convert to dax_copy_from_iter() Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-14 10:58 ` Jan Kara 2017-06-14 10:58 ` Jan Kara 2017-06-14 10:58 ` Jan Kara 2017-06-09 20:24 ` [PATCH v3 04/14] dax, pmem: introduce an optional 'flush' dax_operation Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-14 10:57 ` Jan Kara 2017-06-14 10:57 ` Jan Kara 2017-06-14 10:57 ` Jan Kara 2017-06-09 20:24 ` [PATCH v3 05/14] dm: add ->flush() dax operation support Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-15 1:44 ` Kani, Toshimitsu 2017-06-15 1:44 ` Kani, Toshimitsu 2017-06-15 1:44 ` Kani, Toshimitsu 2017-06-09 20:24 ` [PATCH v3 06/14] filesystem-dax: convert to dax_flush() Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-14 10:56 ` Jan Kara 2017-06-14 10:56 ` Jan Kara 2017-06-14 10:56 ` Jan Kara 2017-06-09 20:24 ` [PATCH v3 07/14] x86, dax: replace clear_pmem() with open coded memset + dax_ops->flush Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-14 10:55 ` Jan Kara 2017-06-14 10:55 ` Jan Kara 2017-06-14 10:55 ` Jan Kara 2017-06-09 20:24 ` [PATCH v3 08/14] x86, dax, libnvdimm: move wb_cache_pmem() to libnvdimm Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-12 0:29 ` [PATCH v4 " Dan Williams 2017-06-12 0:29 ` Dan Williams 2017-06-14 10:54 ` Jan Kara [this message] 2017-06-14 10:54 ` [PATCH v3 " Jan Kara 2017-06-14 16:49 ` Dan Williams 2017-06-14 16:49 ` Dan Williams 2017-06-14 16:49 ` Dan Williams 2017-06-15 8:11 ` Jan Kara 2017-06-15 8:11 ` Jan Kara 2017-06-15 8:11 ` Jan Kara 2017-06-18 8:40 ` Christoph Hellwig 2017-06-18 8:40 ` Christoph Hellwig 2017-06-18 8:40 ` Christoph Hellwig 2017-06-19 2:06 ` Dan Williams 2017-06-19 2:06 ` Dan Williams 2017-06-19 2:06 ` Dan Williams 2017-06-09 20:24 ` [PATCH v3 09/14] x86, libnvdimm, pmem: move arch_invalidate_pmem() " Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-14 10:49 ` Jan Kara 2017-06-14 10:49 ` Jan Kara 2017-06-09 20:24 ` [PATCH v3 10/14] pmem: remove global pmem api Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-14 10:48 ` Jan Kara 2017-06-14 10:48 ` Jan Kara 2017-06-14 10:48 ` Jan Kara 2017-06-09 20:24 ` [PATCH v3 11/14] libnvdimm, pmem: fix persistence warning Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` [PATCH v3 12/14] libnvdimm, nfit: enable support for volatile ranges Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` [PATCH v3 13/14] filesystem-dax: gate calls to dax_flush() on QUEUE_FLAG_WC Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-09 20:24 ` Dan Williams 2017-06-14 10:46 ` Jan Kara 2017-06-14 10:46 ` Jan Kara 2017-06-14 16:49 ` Dan Williams 2017-06-14 16:49 ` Dan Williams 2017-06-14 16:49 ` Dan Williams 2017-06-14 23:11 ` [PATCH v4 13/14] libnvdimm, pmem: gate cache management on QUEUE_FLAG_WC in pmem_dax_flush() Dan Williams 2017-06-14 23:11 ` Dan Williams 2017-06-15 8:09 ` Jan Kara 2017-06-15 8:09 ` Jan Kara 2017-06-18 8:45 ` [PATCH v3 13/14] filesystem-dax: gate calls to dax_flush() on QUEUE_FLAG_WC Christoph Hellwig 2017-06-18 8:45 ` Christoph Hellwig 2017-06-18 8:45 ` Christoph Hellwig 2017-06-19 2:07 ` Dan Williams 2017-06-19 2:07 ` Dan Williams 2017-06-19 2:07 ` Dan Williams 2017-06-09 20:25 ` [PATCH v3 14/14] libnvdimm, pmem: disable dax flushing when pmem is fronting a volatile region Dan Williams 2017-06-09 20:25 ` Dan Williams 2017-06-09 20:25 ` Dan Williams 2017-06-09 23:21 ` Dan Williams 2017-06-09 23:21 ` Dan Williams 2017-06-10 17:54 ` [PATCH v4 " Dan Williams 2017-06-10 17:54 ` Dan Williams
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