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From: Jan Kara <jack@suse.cz>
To: Dan Williams <dan.j.williams@intel.com>
Cc: Jan Kara <jack@suse.cz>, Matthew Wilcox <mawilcox@microsoft.com>,
	X86 ML <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-nvdimm@lists.01.org" <linux-nvdimm@lists.01.org>,
	dm-devel@redhat.com, Ingo Molnar <mingo@redhat.com>,
	Al Viro <viro@zeniv.linux.org.uk>,
	"H. Peter Anvin" <hpa@zytor.com>,
	linux-fsdevel <linux-fsdevel@vger.kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH v3 08/14] x86, dax, libnvdimm: move wb_cache_pmem() to libnvdimm
Date: Thu, 15 Jun 2017 10:11:24 +0200	[thread overview]
Message-ID: <20170615081124.GD1764@quack2.suse.cz> (raw)
In-Reply-To: <CAPcyv4hNLkX9ct=Z9YQ8zaqAYPa_ab_+W+Z8By6=btJEkbrZag@mail.gmail.com>

On Wed 14-06-17 09:49:29, Dan Williams wrote:
> On Wed, Jun 14, 2017 at 3:54 AM, Jan Kara <jack@suse.cz> wrote:
> >> -/**
> >> - * arch_wb_cache_pmem - write back a cache range with CLWB
> >> - * @vaddr:   virtual start address
> >> - * @size:    number of bytes to write back
> >> - *
> >> - * Write back a cache range using the CLWB (cache line write back)
> >> - * instruction. Note that @size is internally rounded up to be cache
> >> - * line size aligned.
> >> - */
> >>  static inline void arch_wb_cache_pmem(void *addr, size_t size)
> >>  {
> >> -     u16 x86_clflush_size = boot_cpu_data.x86_clflush_size;
> >> -     unsigned long clflush_mask = x86_clflush_size - 1;
> >> -     void *vend = addr + size;
> >> -     void *p;
> >> -
> >> -     for (p = (void *)((unsigned long)addr & ~clflush_mask);
> >> -          p < vend; p += x86_clflush_size)
> >> -             clwb(p);
> >> +     clean_cache_range(addr,size);
> >>  }
> >
> > So this will make compilation break on 32-bit x86 as it does not define
> > clean_cache_range(). Do we somewhere force we are on x86_64 when pmem is
> > enabled?
> 
> Yes, this is enforced by:
> 
>     select ARCH_HAS_PMEM_API if X86_64
> 
> ...in arch/x86/Kconfig. We fallback to a dummy arch_wb_cache_pmem()
> implementation and emit this warning for !ARCH_HAS_PMEM_API archs:
> 
>     "nd_pmem namespace0.0: unable to guarantee persistence of writes"

Aha, right. Feel free to add:

Reviewed-by: Jan Kara <jack@suse.cz>

							Honza

-- 
Jan Kara <jack@suse.com>
SUSE Labs, CR
_______________________________________________
Linux-nvdimm mailing list
Linux-nvdimm@lists.01.org
https://lists.01.org/mailman/listinfo/linux-nvdimm

WARNING: multiple messages have this Message-ID (diff)
From: Jan Kara <jack@suse.cz>
To: Dan Williams <dan.j.williams@intel.com>
Cc: Jan Kara <jack@suse.cz>,
	"linux-nvdimm@lists.01.org" <linux-nvdimm@lists.01.org>,
	dm-devel@redhat.com, Matthew Wilcox <mawilcox@microsoft.com>,
	X86 ML <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Christoph Hellwig <hch@lst.de>, Jeff Moyer <jmoyer@redhat.com>,
	Ingo Molnar <mingo@redhat.com>,
	"Oliver O'Halloran" <oohall@gmail.com>,
	Al Viro <viro@zeniv.linux.org.uk>,
	"H. Peter Anvin" <hpa@zytor.com>,
	linux-fsdevel <linux-fsdevel@vger.kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ross Zwisler <ross.zwisler@linux.intel.com>
Subject: Re: [PATCH v3 08/14] x86, dax, libnvdimm: move wb_cache_pmem() to libnvdimm
Date: Thu, 15 Jun 2017 10:11:24 +0200	[thread overview]
Message-ID: <20170615081124.GD1764@quack2.suse.cz> (raw)
In-Reply-To: <CAPcyv4hNLkX9ct=Z9YQ8zaqAYPa_ab_+W+Z8By6=btJEkbrZag@mail.gmail.com>

On Wed 14-06-17 09:49:29, Dan Williams wrote:
> On Wed, Jun 14, 2017 at 3:54 AM, Jan Kara <jack@suse.cz> wrote:
> >> -/**
> >> - * arch_wb_cache_pmem - write back a cache range with CLWB
> >> - * @vaddr:   virtual start address
> >> - * @size:    number of bytes to write back
> >> - *
> >> - * Write back a cache range using the CLWB (cache line write back)
> >> - * instruction. Note that @size is internally rounded up to be cache
> >> - * line size aligned.
> >> - */
> >>  static inline void arch_wb_cache_pmem(void *addr, size_t size)
> >>  {
> >> -     u16 x86_clflush_size = boot_cpu_data.x86_clflush_size;
> >> -     unsigned long clflush_mask = x86_clflush_size - 1;
> >> -     void *vend = addr + size;
> >> -     void *p;
> >> -
> >> -     for (p = (void *)((unsigned long)addr & ~clflush_mask);
> >> -          p < vend; p += x86_clflush_size)
> >> -             clwb(p);
> >> +     clean_cache_range(addr,size);
> >>  }
> >
> > So this will make compilation break on 32-bit x86 as it does not define
> > clean_cache_range(). Do we somewhere force we are on x86_64 when pmem is
> > enabled?
> 
> Yes, this is enforced by:
> 
>     select ARCH_HAS_PMEM_API if X86_64
> 
> ...in arch/x86/Kconfig. We fallback to a dummy arch_wb_cache_pmem()
> implementation and emit this warning for !ARCH_HAS_PMEM_API archs:
> 
>     "nd_pmem namespace0.0: unable to guarantee persistence of writes"

Aha, right. Feel free to add:

Reviewed-by: Jan Kara <jack@suse.cz>

							Honza

-- 
Jan Kara <jack@suse.com>
SUSE Labs, CR

WARNING: multiple messages have this Message-ID (diff)
From: Jan Kara <jack-AlSwsSmVLrQ@public.gmane.org>
To: Dan Williams <dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Cc: Jan Kara <jack-AlSwsSmVLrQ@public.gmane.org>,
	Matthew Wilcox <mawilcox-0li6OtcxBFHby3iVrkZq2A@public.gmane.org>,
	X86 ML <x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-nvdimm-hn68Rpc1hR1g9hUCZPvPmw@public.gmane.org"
	<linux-nvdimm-hn68Rpc1hR1g9hUCZPvPmw@public.gmane.org>,
	dm-devel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	Ingo Molnar <mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
	Al Viro <viro-RmSDqhL/yNMiFSDQTTA3OLVCufUGDwFn@public.gmane.org>,
	"H. Peter Anvin" <hpa-YMNOUZJC4hwAvxtiuMwx3w@public.gmane.org>,
	linux-fsdevel
	<linux-fsdevel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
	Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
Subject: Re: [PATCH v3 08/14] x86, dax, libnvdimm: move wb_cache_pmem() to libnvdimm
Date: Thu, 15 Jun 2017 10:11:24 +0200	[thread overview]
Message-ID: <20170615081124.GD1764@quack2.suse.cz> (raw)
In-Reply-To: <CAPcyv4hNLkX9ct=Z9YQ8zaqAYPa_ab_+W+Z8By6=btJEkbrZag-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On Wed 14-06-17 09:49:29, Dan Williams wrote:
> On Wed, Jun 14, 2017 at 3:54 AM, Jan Kara <jack-AlSwsSmVLrQ@public.gmane.org> wrote:
> >> -/**
> >> - * arch_wb_cache_pmem - write back a cache range with CLWB
> >> - * @vaddr:   virtual start address
> >> - * @size:    number of bytes to write back
> >> - *
> >> - * Write back a cache range using the CLWB (cache line write back)
> >> - * instruction. Note that @size is internally rounded up to be cache
> >> - * line size aligned.
> >> - */
> >>  static inline void arch_wb_cache_pmem(void *addr, size_t size)
> >>  {
> >> -     u16 x86_clflush_size = boot_cpu_data.x86_clflush_size;
> >> -     unsigned long clflush_mask = x86_clflush_size - 1;
> >> -     void *vend = addr + size;
> >> -     void *p;
> >> -
> >> -     for (p = (void *)((unsigned long)addr & ~clflush_mask);
> >> -          p < vend; p += x86_clflush_size)
> >> -             clwb(p);
> >> +     clean_cache_range(addr,size);
> >>  }
> >
> > So this will make compilation break on 32-bit x86 as it does not define
> > clean_cache_range(). Do we somewhere force we are on x86_64 when pmem is
> > enabled?
> 
> Yes, this is enforced by:
> 
>     select ARCH_HAS_PMEM_API if X86_64
> 
> ...in arch/x86/Kconfig. We fallback to a dummy arch_wb_cache_pmem()
> implementation and emit this warning for !ARCH_HAS_PMEM_API archs:
> 
>     "nd_pmem namespace0.0: unable to guarantee persistence of writes"

Aha, right. Feel free to add:

Reviewed-by: Jan Kara <jack-AlSwsSmVLrQ@public.gmane.org>

							Honza

-- 
Jan Kara <jack-IBi9RG/b67k@public.gmane.org>
SUSE Labs, CR

  reply	other threads:[~2017-06-15  8:10 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-09 20:23 [PATCH v3 00/14] pmem: stop abusing __copy_user_nocache(), and other reworks Dan Williams
2017-06-09 20:23 ` Dan Williams
2017-06-09 20:23 ` Dan Williams
2017-06-09 20:23 ` [PATCH v3 01/14] x86, uaccess: introduce copy_from_iter_flushcache for pmem / cache-bypass operations Dan Williams
2017-06-09 20:23   ` Dan Williams
2017-06-09 20:23   ` Dan Williams
2017-06-18  8:28   ` Christoph Hellwig
2017-06-18  8:28     ` Christoph Hellwig
2017-06-18  8:28     ` Christoph Hellwig
2017-06-19  2:02     ` Dan Williams
2017-06-19  2:02       ` Dan Williams
2017-06-19  2:02       ` Dan Williams
2017-06-09 20:23 ` [PATCH v3 02/14] dm: add ->copy_from_iter() dax operation support Dan Williams
2017-06-09 20:23   ` Dan Williams
2017-06-09 20:23   ` Dan Williams
2017-06-15  0:46   ` Kani, Toshimitsu
2017-06-15  0:46     ` Kani, Toshimitsu
2017-06-15  0:46     ` Kani, Toshimitsu
2017-06-15  1:21     ` Kani, Toshimitsu
2017-06-15  1:21       ` Kani, Toshimitsu
2017-06-18  8:37   ` Christoph Hellwig
2017-06-18  8:37     ` Christoph Hellwig
2017-06-18  8:37     ` Christoph Hellwig
2017-06-19  2:04     ` Dan Williams
2017-06-19  2:04       ` Dan Williams
2017-06-19  2:04       ` Dan Williams
2017-06-09 20:24 ` [PATCH v3 03/14] filesystem-dax: convert to dax_copy_from_iter() Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-14 10:58   ` Jan Kara
2017-06-14 10:58     ` Jan Kara
2017-06-14 10:58     ` Jan Kara
2017-06-09 20:24 ` [PATCH v3 04/14] dax, pmem: introduce an optional 'flush' dax_operation Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-14 10:57   ` Jan Kara
2017-06-14 10:57     ` Jan Kara
2017-06-14 10:57     ` Jan Kara
2017-06-09 20:24 ` [PATCH v3 05/14] dm: add ->flush() dax operation support Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-15  1:44   ` Kani, Toshimitsu
2017-06-15  1:44     ` Kani, Toshimitsu
2017-06-15  1:44     ` Kani, Toshimitsu
2017-06-09 20:24 ` [PATCH v3 06/14] filesystem-dax: convert to dax_flush() Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-14 10:56   ` Jan Kara
2017-06-14 10:56     ` Jan Kara
2017-06-14 10:56     ` Jan Kara
2017-06-09 20:24 ` [PATCH v3 07/14] x86, dax: replace clear_pmem() with open coded memset + dax_ops->flush Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-14 10:55   ` Jan Kara
2017-06-14 10:55     ` Jan Kara
2017-06-14 10:55     ` Jan Kara
2017-06-09 20:24 ` [PATCH v3 08/14] x86, dax, libnvdimm: move wb_cache_pmem() to libnvdimm Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-12  0:29   ` [PATCH v4 " Dan Williams
2017-06-12  0:29     ` Dan Williams
2017-06-14 10:54   ` [PATCH v3 " Jan Kara
2017-06-14 10:54     ` Jan Kara
2017-06-14 16:49     ` Dan Williams
2017-06-14 16:49       ` Dan Williams
2017-06-14 16:49       ` Dan Williams
2017-06-15  8:11       ` Jan Kara [this message]
2017-06-15  8:11         ` Jan Kara
2017-06-15  8:11         ` Jan Kara
2017-06-18  8:40   ` Christoph Hellwig
2017-06-18  8:40     ` Christoph Hellwig
2017-06-18  8:40     ` Christoph Hellwig
2017-06-19  2:06     ` Dan Williams
2017-06-19  2:06       ` Dan Williams
2017-06-19  2:06       ` Dan Williams
2017-06-09 20:24 ` [PATCH v3 09/14] x86, libnvdimm, pmem: move arch_invalidate_pmem() " Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-14 10:49   ` Jan Kara
2017-06-14 10:49     ` Jan Kara
2017-06-09 20:24 ` [PATCH v3 10/14] pmem: remove global pmem api Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-14 10:48   ` Jan Kara
2017-06-14 10:48     ` Jan Kara
2017-06-14 10:48     ` Jan Kara
2017-06-09 20:24 ` [PATCH v3 11/14] libnvdimm, pmem: fix persistence warning Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24 ` [PATCH v3 12/14] libnvdimm, nfit: enable support for volatile ranges Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24 ` [PATCH v3 13/14] filesystem-dax: gate calls to dax_flush() on QUEUE_FLAG_WC Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-09 20:24   ` Dan Williams
2017-06-14 10:46   ` Jan Kara
2017-06-14 10:46     ` Jan Kara
2017-06-14 16:49     ` Dan Williams
2017-06-14 16:49       ` Dan Williams
2017-06-14 16:49       ` Dan Williams
2017-06-14 23:11   ` [PATCH v4 13/14] libnvdimm, pmem: gate cache management on QUEUE_FLAG_WC in pmem_dax_flush() Dan Williams
2017-06-14 23:11     ` Dan Williams
2017-06-15  8:09     ` Jan Kara
2017-06-15  8:09       ` Jan Kara
2017-06-18  8:45   ` [PATCH v3 13/14] filesystem-dax: gate calls to dax_flush() on QUEUE_FLAG_WC Christoph Hellwig
2017-06-18  8:45     ` Christoph Hellwig
2017-06-18  8:45     ` Christoph Hellwig
2017-06-19  2:07     ` Dan Williams
2017-06-19  2:07       ` Dan Williams
2017-06-19  2:07       ` Dan Williams
2017-06-09 20:25 ` [PATCH v3 14/14] libnvdimm, pmem: disable dax flushing when pmem is fronting a volatile region Dan Williams
2017-06-09 20:25   ` Dan Williams
2017-06-09 20:25   ` Dan Williams
2017-06-09 23:21   ` Dan Williams
2017-06-09 23:21     ` Dan Williams
2017-06-10 17:54   ` [PATCH v4 " Dan Williams
2017-06-10 17:54     ` Dan Williams

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