From: Animesh Manna <animesh.manna@intel.com> To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com, nidhi1.gupta@intel.com Subject: [RFC 0/7] DP Phy compliace auto test Date: Fri, 15 Nov 2019 20:55:42 +0530 [thread overview] Message-ID: <20191115152549.23047-1-animesh.manna@intel.com> (raw) Driver changes mainly to process the request coming from Test equipment as short pulse hpd interrupt to change link-pattern/v-swing/pre-emphasis Complete auto test suite takes much lesser time than manual run. Overall design: -------------- Automate test request will come to source device as HDP short pulse interrupt from test scope. Read DPCD 0x201, Check for bit 1 for automated test request. If set continue and read DPCD 0x218. Check for bit 3 for phy test pattern, If set continue. Get the requested test pattern through DPCD 0x248. Compute requested voltage swing level and pre-emphasis level from DPCD 0x206 and 0x207 Set signal level through vswing programming sequence. Write DDI_COMP_CTL and DDI_COMP_PATx as per requested pattern. Configure the link and write the new test pattern through DPCD. High level patch description. ----------------------------- patch 1: drm level api added to get/set test pattern as per vesa DP spec. This maybe useful for other driver so added in drm layer. patch 2: vswing/preemphasis adjustment calculation is needed during phy compliance request processing along with existing link training process, so moved the same function in intel_dp.c. patch 3: Parse the test scope request regarding rquested test pattern, vswing level, preemphasis level. patch 4: Notify testapp through uevent. patch 5: Register difnition of DP compliance register added. patch 6: Funcion added to update the pattern in source side. patch 7: This patch os mainly processing the request. Currently through prototyping patch able to run DP compliance where vswing, preemphasis and test pattern is changing fine but complete test is under process. As per feedback redesigned the code. Could not test due to unavailability of test scope, so sending as RFC again to get design feedback. Animesh Manna (7): drm/dp: get/set phy compliance pattern. drm/i915/dp: Move vswing/pre-emphasis adjustment calculation drm/i915/dp: Preparation for DP phy compliance auto test. drm/i915/dp: Notify testapp using uevent and debugfs entry drm/i915/dp: Register definition for DP compliance register. drm/i915/dp: Update the pattern as per request drm/i915/dp: Program vswing, pre-emphasis, test-pattern drivers/gpu/drm/drm_dp_helper.c | 97 +++++++++ drivers/gpu/drm/i915/display/intel_ddi.c | 14 ++ drivers/gpu/drm/i915/display/intel_display.c | 5 + .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 194 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_dp.h | 5 + .../drm/i915/display/intel_dp_link_training.c | 32 --- drivers/gpu/drm/i915/i915_debugfs.c | 10 + drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/i915_reg.h | 20 ++ include/drm/drm_dp_helper.h | 34 ++- 11 files changed, 379 insertions(+), 35 deletions(-) -- 2.22.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Animesh Manna <animesh.manna@intel.com> To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com, nidhi1.gupta@intel.com Subject: [Intel-gfx] [RFC 0/7] DP Phy compliace auto test Date: Fri, 15 Nov 2019 20:55:42 +0530 [thread overview] Message-ID: <20191115152549.23047-1-animesh.manna@intel.com> (raw) Message-ID: <20191115152542.eFCRSAEOk8IfLXV1INJ_kP84e6LUzQRf2U_EOI2LOLw@z> (raw) Driver changes mainly to process the request coming from Test equipment as short pulse hpd interrupt to change link-pattern/v-swing/pre-emphasis Complete auto test suite takes much lesser time than manual run. Overall design: -------------- Automate test request will come to source device as HDP short pulse interrupt from test scope. Read DPCD 0x201, Check for bit 1 for automated test request. If set continue and read DPCD 0x218. Check for bit 3 for phy test pattern, If set continue. Get the requested test pattern through DPCD 0x248. Compute requested voltage swing level and pre-emphasis level from DPCD 0x206 and 0x207 Set signal level through vswing programming sequence. Write DDI_COMP_CTL and DDI_COMP_PATx as per requested pattern. Configure the link and write the new test pattern through DPCD. High level patch description. ----------------------------- patch 1: drm level api added to get/set test pattern as per vesa DP spec. This maybe useful for other driver so added in drm layer. patch 2: vswing/preemphasis adjustment calculation is needed during phy compliance request processing along with existing link training process, so moved the same function in intel_dp.c. patch 3: Parse the test scope request regarding rquested test pattern, vswing level, preemphasis level. patch 4: Notify testapp through uevent. patch 5: Register difnition of DP compliance register added. patch 6: Funcion added to update the pattern in source side. patch 7: This patch os mainly processing the request. Currently through prototyping patch able to run DP compliance where vswing, preemphasis and test pattern is changing fine but complete test is under process. As per feedback redesigned the code. Could not test due to unavailability of test scope, so sending as RFC again to get design feedback. Animesh Manna (7): drm/dp: get/set phy compliance pattern. drm/i915/dp: Move vswing/pre-emphasis adjustment calculation drm/i915/dp: Preparation for DP phy compliance auto test. drm/i915/dp: Notify testapp using uevent and debugfs entry drm/i915/dp: Register definition for DP compliance register. drm/i915/dp: Update the pattern as per request drm/i915/dp: Program vswing, pre-emphasis, test-pattern drivers/gpu/drm/drm_dp_helper.c | 97 +++++++++ drivers/gpu/drm/i915/display/intel_ddi.c | 14 ++ drivers/gpu/drm/i915/display/intel_display.c | 5 + .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 194 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_dp.h | 5 + .../drm/i915/display/intel_dp_link_training.c | 32 --- drivers/gpu/drm/i915/i915_debugfs.c | 10 + drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/i915_reg.h | 20 ++ include/drm/drm_dp_helper.h | 34 ++- 11 files changed, 379 insertions(+), 35 deletions(-) -- 2.22.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2019-11-15 15:35 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-15 15:25 Animesh Manna [this message] 2019-11-15 15:25 ` [Intel-gfx] [RFC 0/7] DP Phy compliace auto test Animesh Manna 2019-11-15 15:25 ` [RFC 1/7] drm/dp: get/set phy compliance pattern Animesh Manna 2019-11-15 15:25 ` [Intel-gfx] " Animesh Manna 2019-11-18 4:04 ` Manasi Navare 2019-11-18 4:04 ` [Intel-gfx] " Manasi Navare 2019-11-18 18:39 ` Animesh Manna 2019-11-18 18:39 ` [Intel-gfx] " Animesh Manna 2019-11-15 15:25 ` [RFC 2/7] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation Animesh Manna 2019-11-15 15:25 ` [Intel-gfx] " Animesh Manna 2019-11-15 15:25 ` [RFC 3/7] drm/i915/dp: Preparation for DP phy compliance auto test Animesh Manna 2019-11-15 15:25 ` [Intel-gfx] " Animesh Manna 2019-11-18 4:47 ` Manasi Navare 2019-11-18 4:47 ` [Intel-gfx] " Manasi Navare 2019-11-15 15:25 ` [RFC 4/7] drm/i915/dp: Notify testapp using uevent and debugfs entry Animesh Manna 2019-11-15 15:25 ` [Intel-gfx] " Animesh Manna 2019-11-18 4:58 ` Manasi Navare 2019-11-18 4:58 ` [Intel-gfx] " Manasi Navare 2019-11-18 5:06 ` Manasi Navare 2019-11-18 5:06 ` [Intel-gfx] " Manasi Navare 2019-11-18 18:45 ` Animesh Manna 2019-11-18 18:45 ` [Intel-gfx] " Animesh Manna 2019-11-15 15:25 ` [RFC 5/7] drm/i915/dp: Register definition for DP compliance register Animesh Manna 2019-11-15 15:25 ` [Intel-gfx] " Animesh Manna 2019-11-18 5:00 ` Manasi Navare 2019-11-18 5:00 ` [Intel-gfx] " Manasi Navare 2019-11-15 15:25 ` [RFC 6/7] drm/i915/dp: Update the pattern as per request Animesh Manna 2019-11-15 15:25 ` [Intel-gfx] " Animesh Manna 2019-11-18 6:41 ` Manasi Navare 2019-11-18 6:41 ` [Intel-gfx] " Manasi Navare 2019-11-18 18:47 ` Animesh Manna 2019-11-18 18:47 ` [Intel-gfx] " Animesh Manna 2019-12-11 23:44 ` Manasi Navare 2019-11-15 15:25 ` [RFC 7/7] drm/i915/dp: Program vswing, pre-emphasis, test-pattern Animesh Manna 2019-11-15 15:25 ` [Intel-gfx] " Animesh Manna 2019-11-18 7:53 ` Manasi Navare 2019-11-18 7:53 ` [Intel-gfx] " Manasi Navare 2019-12-11 23:50 ` Manasi Navare 2019-12-13 17:24 ` Animesh Manna 2020-01-14 21:38 ` Manasi Navare 2020-01-20 13:53 ` Manna, Animesh 2020-01-24 0:56 ` Manasi Navare 2019-11-15 19:27 ` ✗ Fi.CI.BUILD: failure for DP Phy compliace auto test Patchwork 2019-11-15 19:27 ` [Intel-gfx] " Patchwork
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