From: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
To: Hans de Goede <hdegoede@redhat.com>
Cc: "Thierry Reding" <thierry.reding@gmail.com>,
"Jani Nikula" <jani.nikula@linux.intel.com>,
"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
"Len Brown" <lenb@kernel.org>,
linux-pwm@vger.kernel.org,
intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel@lists.freedesktop.org,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Mika Westerberg" <mika.westerberg@linux.intel.com>,
linux-acpi@vger.kernel.org,
"Shobhit Kumar" <shobhit.kumar@intel.com>
Subject: Re: [PATCH v3 09/15] pwm: crc: Enable/disable PWM output on enable/disable
Date: Mon, 22 Jun 2020 09:55:09 +0200 [thread overview]
Message-ID: <20200622075509.v4jlvqeyjip6wr6c@taurus.defre.kleine-koenig.org> (raw)
In-Reply-To: <20200620121758.14836-10-hdegoede@redhat.com>
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Hello,
[adding Shobhit Kumar <shobhit.kumar@intel.com> to Cc who is the author
of this driver according to the comment on the top of the driver]
On Sat, Jun 20, 2020 at 02:17:52PM +0200, Hans de Goede wrote:
> The pwm-crc code is using 2 different enable bits:
> 1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
> 2. bit 0 of the BACKLIGHT_EN register
>
> So far we've kept the PWM_OUTPUT_ENABLE bit set when disabling the PWM,
> this commit makes crc_pwm_disable() clear it on disable and makes
> crc_pwm_enable() set it again on re-enable.
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
> Changes in v3:
> - Remove paragraph about tri-stating the output from the commit message,
> we don't have a datasheet so this was just an unfounded guess
I have the impression you spend quite some time with this driver trying
to understand it. What I still think is a bit unfortunate is that there
is quite some guesswork involved. I wonder if it would be possible to
get the manual of that PWM. Do I understand correctly that this is IP
from Intel? There are quite some Intel people on Cc; maybe someone can
help/put in a good word/check and ack the changes?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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WARNING: multiple messages have this Message-ID (diff)
From: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
To: Hans de Goede <hdegoede@redhat.com>
Cc: linux-pwm@vger.kernel.org,
Shobhit Kumar <shobhit.kumar@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
linux-acpi@vger.kernel.org,
Thierry Reding <thierry.reding@gmail.com>,
dri-devel@lists.freedesktop.org,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Len Brown <lenb@kernel.org>
Subject: Re: [PATCH v3 09/15] pwm: crc: Enable/disable PWM output on enable/disable
Date: Mon, 22 Jun 2020 09:55:09 +0200 [thread overview]
Message-ID: <20200622075509.v4jlvqeyjip6wr6c@taurus.defre.kleine-koenig.org> (raw)
In-Reply-To: <20200620121758.14836-10-hdegoede@redhat.com>
[-- Attachment #1.1: Type: text/plain, Size: 1378 bytes --]
Hello,
[adding Shobhit Kumar <shobhit.kumar@intel.com> to Cc who is the author
of this driver according to the comment on the top of the driver]
On Sat, Jun 20, 2020 at 02:17:52PM +0200, Hans de Goede wrote:
> The pwm-crc code is using 2 different enable bits:
> 1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
> 2. bit 0 of the BACKLIGHT_EN register
>
> So far we've kept the PWM_OUTPUT_ENABLE bit set when disabling the PWM,
> this commit makes crc_pwm_disable() clear it on disable and makes
> crc_pwm_enable() set it again on re-enable.
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
> Changes in v3:
> - Remove paragraph about tri-stating the output from the commit message,
> we don't have a datasheet so this was just an unfounded guess
I have the impression you spend quite some time with this driver trying
to understand it. What I still think is a bit unfortunate is that there
is quite some guesswork involved. I wonder if it would be possible to
get the manual of that PWM. Do I understand correctly that this is IP
from Intel? There are quite some Intel people on Cc; maybe someone can
help/put in a good word/check and ack the changes?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
To: Hans de Goede <hdegoede@redhat.com>
Cc: linux-pwm@vger.kernel.org,
Shobhit Kumar <shobhit.kumar@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
linux-acpi@vger.kernel.org, dri-devel@lists.freedesktop.org,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Len Brown <lenb@kernel.org>
Subject: Re: [Intel-gfx] [PATCH v3 09/15] pwm: crc: Enable/disable PWM output on enable/disable
Date: Mon, 22 Jun 2020 09:55:09 +0200 [thread overview]
Message-ID: <20200622075509.v4jlvqeyjip6wr6c@taurus.defre.kleine-koenig.org> (raw)
In-Reply-To: <20200620121758.14836-10-hdegoede@redhat.com>
[-- Attachment #1.1: Type: text/plain, Size: 1378 bytes --]
Hello,
[adding Shobhit Kumar <shobhit.kumar@intel.com> to Cc who is the author
of this driver according to the comment on the top of the driver]
On Sat, Jun 20, 2020 at 02:17:52PM +0200, Hans de Goede wrote:
> The pwm-crc code is using 2 different enable bits:
> 1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
> 2. bit 0 of the BACKLIGHT_EN register
>
> So far we've kept the PWM_OUTPUT_ENABLE bit set when disabling the PWM,
> this commit makes crc_pwm_disable() clear it on disable and makes
> crc_pwm_enable() set it again on re-enable.
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
> Changes in v3:
> - Remove paragraph about tri-stating the output from the commit message,
> we don't have a datasheet so this was just an unfounded guess
I have the impression you spend quite some time with this driver trying
to understand it. What I still think is a bit unfortunate is that there
is quite some guesswork involved. I wonder if it would be possible to
get the manual of that PWM. Do I understand correctly that this is IP
from Intel? There are quite some Intel people on Cc; maybe someone can
help/put in a good word/check and ack the changes?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-06-22 7:55 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-20 12:17 [PATCH v3 00/15] acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 01/15] ACPI / LPSS: Resume Cherry Trail PWM controller in no-irq phase Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-22 16:03 ` Rafael J. Wysocki
2020-06-22 16:03 ` [Intel-gfx] " Rafael J. Wysocki
2020-06-22 16:03 ` Rafael J. Wysocki
2020-06-20 12:17 ` [PATCH v3 02/15] ACPI / LPSS: Save Cherry Trail PWM ctx registers only once (at activation) Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-22 16:04 ` Rafael J. Wysocki
2020-06-22 16:04 ` [Intel-gfx] " Rafael J. Wysocki
2020-06-22 16:04 ` Rafael J. Wysocki
2020-06-20 12:17 ` [PATCH v3 03/15] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare() Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-22 7:25 ` Uwe Kleine-König
2020-06-22 7:25 ` [Intel-gfx] " Uwe Kleine-König
2020-06-22 7:25 ` Uwe Kleine-König
2020-06-20 12:17 ` [PATCH v3 04/15] pwm: lpss: Add range limit check for the base_unit register value Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-22 7:35 ` Uwe Kleine-König
2020-06-22 7:35 ` [Intel-gfx] " Uwe Kleine-König
2020-06-22 7:35 ` Uwe Kleine-König
2020-07-06 20:53 ` Hans de Goede
2020-07-06 20:53 ` [Intel-gfx] " Hans de Goede
2020-07-06 20:53 ` Hans de Goede
2020-07-07 7:34 ` Uwe Kleine-König
2020-07-07 7:34 ` [Intel-gfx] " Uwe Kleine-König
2020-07-07 7:34 ` Uwe Kleine-König
2020-07-07 8:04 ` Hans de Goede
2020-07-07 8:04 ` [Intel-gfx] " Hans de Goede
2020-07-07 8:04 ` Hans de Goede
2020-07-07 17:31 ` Hans de Goede
2020-07-07 17:31 ` [Intel-gfx] " Hans de Goede
2020-07-07 17:31 ` Hans de Goede
2020-07-07 19:09 ` Uwe Kleine-König
2020-07-07 19:09 ` [Intel-gfx] " Uwe Kleine-König
2020-07-07 19:09 ` Uwe Kleine-König
2020-07-07 19:41 ` Hans de Goede
2020-07-07 19:41 ` [Intel-gfx] " Hans de Goede
2020-07-07 19:41 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 05/15] pwm: lpss: Use pwm_lpss_apply() when restoring state on resume Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 06/15] pwm: crc: Fix period / duty_cycle times being off by a factor of 256 Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 07/15] pwm: crc: Fix off-by-one error in the clock-divider calculations Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 08/15] pwm: crc: Fix period changes not having any effect Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 09/15] pwm: crc: Enable/disable PWM output on enable/disable Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-22 7:55 ` Uwe Kleine-König [this message]
2020-06-22 7:55 ` [Intel-gfx] " Uwe Kleine-König
2020-06-22 7:55 ` Uwe Kleine-König
2020-07-06 21:03 ` Hans de Goede
2020-07-06 21:03 ` [Intel-gfx] " Hans de Goede
2020-07-06 21:03 ` Hans de Goede
2020-07-07 7:26 ` Uwe Kleine-König
2020-07-07 7:26 ` [Intel-gfx] " Uwe Kleine-König
2020-07-07 7:26 ` Uwe Kleine-König
2020-06-20 12:17 ` [PATCH v3 10/15] pwm: crc: Implement apply() method to support the new atomic PWM API Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 11/15] pwm: crc: Implement get_state() method Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-22 7:57 ` Uwe Kleine-König
2020-06-22 7:57 ` [Intel-gfx] " Uwe Kleine-König
2020-06-22 7:57 ` Uwe Kleine-König
2020-07-06 21:05 ` Hans de Goede
2020-07-06 21:05 ` [Intel-gfx] " Hans de Goede
2020-07-06 21:05 ` Hans de Goede
2020-07-06 21:05 ` Hans de Goede
2020-07-07 7:24 ` Uwe Kleine-König
2020-07-07 7:24 ` [Intel-gfx] " Uwe Kleine-König
2020-07-07 7:24 ` Uwe Kleine-König
2020-06-20 12:17 ` [PATCH v3 12/15] drm/i915: panel: Add get_vbt_pwm_freq() helper Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 13/15] drm/i915: panel: Honor the VBT PWM frequency for devs with an external PWM controller Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 14/15] drm/i915: panel: Honor the VBT PWM min setting " Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-06-20 12:17 ` [PATCH v3 15/15] drm/i915: panel: Use atomic PWM API " Hans de Goede
2020-06-20 12:17 ` [Intel-gfx] " Hans de Goede
2020-06-20 12:17 ` Hans de Goede
2020-07-07 7:50 ` Uwe Kleine-König
2020-07-07 7:50 ` [Intel-gfx] " Uwe Kleine-König
2020-07-07 7:50 ` Uwe Kleine-König
2020-07-07 19:21 ` Hans de Goede
2020-07-07 19:21 ` [Intel-gfx] " Hans de Goede
2020-07-07 19:21 ` Hans de Goede
2020-06-20 12:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Patchwork
2020-06-20 13:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-20 14:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-06-30 13:51 ` [PATCH v3 00/15] " Jani Nikula
2020-06-30 13:51 ` [Intel-gfx] " Jani Nikula
2020-06-30 13:51 ` Jani Nikula
2020-06-30 13:51 ` Jani Nikula
2020-07-06 20:53 ` Hans de Goede
2020-07-06 20:53 ` [Intel-gfx] " Hans de Goede
2020-07-06 20:53 ` Hans de Goede
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