From: Michael Walle <michael@walle.cc> To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: "Linus Walleij" <linus.walleij@linaro.org>, "Bartosz Golaszewski" <bgolaszewski@baylibre.com>, "Rob Herring" <robh+dt@kernel.org>, "Jean Delvare" <jdelvare@suse.com>, "Guenter Roeck" <linux@roeck-us.net>, "Lee Jones" <lee.jones@linaro.org>, "Thierry Reding" <thierry.reding@gmail.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Wim Van Sebroeck" <wim@linux-watchdog.org>, "Shawn Guo" <shawnguo@kernel.org>, "Li Yang" <leoyang.li@nxp.com>, "Thomas Gleixner" <tglx@linutronix.de>, "Jason Cooper" <jason@lakedaemon.net>, "Marc Zyngier" <maz@kernel.org>, "Mark Brown" <broonie@kernel.org>, "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>, "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>, "Michael Walle" <michael@walle.cc> Subject: [PATCH v5 07/13] pwm: add support for sl28cpld PWM controller Date: Mon, 6 Jul 2020 19:53:47 +0200 [thread overview] Message-ID: <20200706175353.16404-8-michael@walle.cc> (raw) In-Reply-To: <20200706175353.16404-1-michael@walle.cc> Add support for the PWM controller of the sl28cpld board management controller. This is part of a multi-function device driver. The controller has one PWM channel and can just generate four distinct frequencies. Signed-off-by: Michael Walle <michael@walle.cc> --- Changes since v4: - update copyright year - remove #include <linux/of_device.h>, suggested by Andy. - make the pwm mode table look nicer, suggested by Lee. - use dev_get_drvdata(chip->dev) instead of container_of(), suggested by Lee. - use whole sentence in comments, suggested by Lee. - renamed the local "struct sl28cpld_pwm" variable to "priv" everywhere, suggested by Lee. - use pwm_{get,set}_relative_duty_cycle(), suggested by Andy. - make the comment about the 250Hz hardware limitation clearer - don't use "if (ret < 0)", but only "if (ret)", suggested by Andy. - don't use KBUID_MODNAME - remove comma in terminator line of the compatible strings list - remove the platform device table Changes since v3: - see cover letter drivers/pwm/Kconfig | 10 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-sl28cpld.c | 187 +++++++++++++++++++++++++++++++++++++ 3 files changed, 198 insertions(+) create mode 100644 drivers/pwm/pwm-sl28cpld.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 7dbcf6973d33..a0d50d70c3b9 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -428,6 +428,16 @@ config PWM_SIFIVE To compile this driver as a module, choose M here: the module will be called pwm-sifive. +config PWM_SL28CPLD + tristate "Kontron sl28cpld PWM support" + select MFD_SIMPLE_MFD_I2C + help + Generic PWM framework driver for board management controller + found on the Kontron sl28 CPLD. + + To compile this driver as a module, choose M here: the module + will be called pwm-sl28cpld. + config PWM_SPEAR tristate "STMicroelectronics SPEAr PWM support" depends on PLAT_SPEAR || COMPILE_TEST diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 2c2ba0a03557..cbdcd55d69ee 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o +obj-$(CONFIG_PWM_SL28CPLD) += pwm-sl28cpld.o obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o obj-$(CONFIG_PWM_SPRD) += pwm-sprd.o obj-$(CONFIG_PWM_STI) += pwm-sti.o diff --git a/drivers/pwm/pwm-sl28cpld.c b/drivers/pwm/pwm-sl28cpld.c new file mode 100644 index 000000000000..8ee286b605bf --- /dev/null +++ b/drivers/pwm/pwm-sl28cpld.c @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld PWM driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include <linux/bitfield.h> +#include <linux/kernel.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/pwm.h> +#include <linux/regmap.h> + +/* + * PWM timer block registers. + */ +#define PWM_CTRL 0x00 +#define PWM_ENABLE BIT(7) +#define PWM_MODE_250HZ 0 +#define PWM_MODE_500HZ 1 +#define PWM_MODE_1KHZ 2 +#define PWM_MODE_2KHZ 3 +#define PWM_MODE_MASK GENMASK(1, 0) +#define PWM_CYCLE 0x01 +#define PWM_CYCLE_MAX 0x7f + +struct sl28cpld_pwm { + struct pwm_chip pwm_chip; + struct regmap *regmap; + u32 offset; +}; + +struct sl28cpld_pwm_periods { + u8 ctrl; + unsigned long duty_cycle; +}; + +struct sl28cpld_pwm_config { + unsigned long period_ns; + u8 max_duty_cycle; +}; + +static struct sl28cpld_pwm_config sl28cpld_pwm_config[] = { + [PWM_MODE_250HZ] = { .period_ns = 4000000, .max_duty_cycle = 0x80 }, + [PWM_MODE_500HZ] = { .period_ns = 2000000, .max_duty_cycle = 0x40 }, + [PWM_MODE_1KHZ] = { .period_ns = 1000000, .max_duty_cycle = 0x20 }, + [PWM_MODE_2KHZ] = { .period_ns = 500000, .max_duty_cycle = 0x10 }, +}; + +static void sl28cpld_pwm_get_state(struct pwm_chip *chip, + struct pwm_device *pwm, + struct pwm_state *state) +{ + struct sl28cpld_pwm *priv = dev_get_drvdata(chip->dev); + static struct sl28cpld_pwm_config *config; + unsigned int reg; + unsigned int mode; + + regmap_read(priv->regmap, priv->offset + PWM_CTRL, ®); + + state->enabled = reg & PWM_ENABLE; + + mode = FIELD_GET(PWM_MODE_MASK, reg); + config = &sl28cpld_pwm_config[mode]; + state->period = config->period_ns; + + regmap_read(priv->regmap, priv->offset + PWM_CYCLE, ®); + pwm_set_relative_duty_cycle(state, reg, config->max_duty_cycle); +} + +static int sl28cpld_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) +{ + struct sl28cpld_pwm *priv = dev_get_drvdata(chip->dev); + struct sl28cpld_pwm_config *config; + unsigned int cycle; + int ret; + int mode; + u8 ctrl; + + /* Get the configuration by comparing the period */ + for (mode = 0; mode < ARRAY_SIZE(sl28cpld_pwm_config); mode++) { + config = &sl28cpld_pwm_config[mode]; + if (state->period == config->period_ns) + break; + } + + if (mode == ARRAY_SIZE(sl28cpld_pwm_config)) + return -EINVAL; + + ctrl = FIELD_PREP(PWM_MODE_MASK, mode); + if (state->enabled) + ctrl |= PWM_ENABLE; + + cycle = pwm_get_relative_duty_cycle(state, config->max_duty_cycle); + + /* + * The hardware doesn't allow to set max_duty_cycle if the + * 250Hz mode is enabled, thus we have to trap that here. + * But because a 100% duty cycle is equal on all modes, i.e. + * it is just a "all-high" output, we trap any case with a + * 100% duty cycle and use the 500Hz mode. + */ + if (cycle == config->max_duty_cycle) { + ctrl &= ~PWM_MODE_MASK; + ctrl |= FIELD_PREP(PWM_MODE_MASK, PWM_MODE_500HZ); + cycle = PWM_CYCLE_MAX; + } + + ret = regmap_write(priv->regmap, priv->offset + PWM_CTRL, ctrl); + if (ret) + return ret; + + return regmap_write(priv->regmap, priv->offset + PWM_CYCLE, (u8)cycle); +} + +static const struct pwm_ops sl28cpld_pwm_ops = { + .apply = sl28cpld_pwm_apply, + .get_state = sl28cpld_pwm_get_state, + .owner = THIS_MODULE, +}; + +static int sl28cpld_pwm_probe(struct platform_device *pdev) +{ + struct sl28cpld_pwm *priv; + struct pwm_chip *chip; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!priv->regmap) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &priv->offset); + if (ret) + return -EINVAL; + + /* Initialize the pwm_chip structure */ + chip = &priv->pwm_chip; + chip->dev = &pdev->dev; + chip->ops = &sl28cpld_pwm_ops; + chip->base = -1; + chip->npwm = 1; + + ret = pwmchip_add(&priv->pwm_chip); + if (ret) + return ret; + + platform_set_drvdata(pdev, priv); + + return 0; +} + +static int sl28cpld_pwm_remove(struct platform_device *pdev) +{ + struct sl28cpld_pwm *priv = platform_get_drvdata(pdev); + + return pwmchip_remove(&priv->pwm_chip); +} + +static const struct of_device_id sl28cpld_pwm_of_match[] = { + { .compatible = "kontron,sl28cpld-pwm" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_pwm_of_match); + +static struct platform_driver sl28cpld_pwm_driver = { + .probe = sl28cpld_pwm_probe, + .remove = sl28cpld_pwm_remove, + .driver = { + .name = "sl28cpld-pwm", + .of_match_table = sl28cpld_pwm_of_match, + }, +}; +module_platform_driver(sl28cpld_pwm_driver); + +MODULE_DESCRIPTION("sl28cpld PWM Driver"); +MODULE_AUTHOR("Michael Walle <michael@walle.cc>"); +MODULE_LICENSE("GPL"); -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Michael Walle <michael@walle.cc> To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: "Marc Zyngier" <maz@kernel.org>, "Jean Delvare" <jdelvare@suse.com>, "Jason Cooper" <jason@lakedaemon.net>, "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>, "Shawn Guo" <shawnguo@kernel.org>, "Linus Walleij" <linus.walleij@linaro.org>, "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>, "Li Yang" <leoyang.li@nxp.com>, "Bartosz Golaszewski" <bgolaszewski@baylibre.com>, "Michael Walle" <michael@walle.cc>, "Rob Herring" <robh+dt@kernel.org>, "Thierry Reding" <thierry.reding@gmail.com>, "Mark Brown" <broonie@kernel.org>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Thomas Gleixner" <tglx@linutronix.de>, "Wim Van Sebroeck" <wim@linux-watchdog.org>, "Lee Jones" <lee.jones@linaro.org>, "Guenter Roeck" <linux@roeck-us.net> Subject: [PATCH v5 07/13] pwm: add support for sl28cpld PWM controller Date: Mon, 6 Jul 2020 19:53:47 +0200 [thread overview] Message-ID: <20200706175353.16404-8-michael@walle.cc> (raw) In-Reply-To: <20200706175353.16404-1-michael@walle.cc> Add support for the PWM controller of the sl28cpld board management controller. This is part of a multi-function device driver. The controller has one PWM channel and can just generate four distinct frequencies. Signed-off-by: Michael Walle <michael@walle.cc> --- Changes since v4: - update copyright year - remove #include <linux/of_device.h>, suggested by Andy. - make the pwm mode table look nicer, suggested by Lee. - use dev_get_drvdata(chip->dev) instead of container_of(), suggested by Lee. - use whole sentence in comments, suggested by Lee. - renamed the local "struct sl28cpld_pwm" variable to "priv" everywhere, suggested by Lee. - use pwm_{get,set}_relative_duty_cycle(), suggested by Andy. - make the comment about the 250Hz hardware limitation clearer - don't use "if (ret < 0)", but only "if (ret)", suggested by Andy. - don't use KBUID_MODNAME - remove comma in terminator line of the compatible strings list - remove the platform device table Changes since v3: - see cover letter drivers/pwm/Kconfig | 10 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-sl28cpld.c | 187 +++++++++++++++++++++++++++++++++++++ 3 files changed, 198 insertions(+) create mode 100644 drivers/pwm/pwm-sl28cpld.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 7dbcf6973d33..a0d50d70c3b9 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -428,6 +428,16 @@ config PWM_SIFIVE To compile this driver as a module, choose M here: the module will be called pwm-sifive. +config PWM_SL28CPLD + tristate "Kontron sl28cpld PWM support" + select MFD_SIMPLE_MFD_I2C + help + Generic PWM framework driver for board management controller + found on the Kontron sl28 CPLD. + + To compile this driver as a module, choose M here: the module + will be called pwm-sl28cpld. + config PWM_SPEAR tristate "STMicroelectronics SPEAr PWM support" depends on PLAT_SPEAR || COMPILE_TEST diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 2c2ba0a03557..cbdcd55d69ee 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o +obj-$(CONFIG_PWM_SL28CPLD) += pwm-sl28cpld.o obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o obj-$(CONFIG_PWM_SPRD) += pwm-sprd.o obj-$(CONFIG_PWM_STI) += pwm-sti.o diff --git a/drivers/pwm/pwm-sl28cpld.c b/drivers/pwm/pwm-sl28cpld.c new file mode 100644 index 000000000000..8ee286b605bf --- /dev/null +++ b/drivers/pwm/pwm-sl28cpld.c @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld PWM driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include <linux/bitfield.h> +#include <linux/kernel.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/pwm.h> +#include <linux/regmap.h> + +/* + * PWM timer block registers. + */ +#define PWM_CTRL 0x00 +#define PWM_ENABLE BIT(7) +#define PWM_MODE_250HZ 0 +#define PWM_MODE_500HZ 1 +#define PWM_MODE_1KHZ 2 +#define PWM_MODE_2KHZ 3 +#define PWM_MODE_MASK GENMASK(1, 0) +#define PWM_CYCLE 0x01 +#define PWM_CYCLE_MAX 0x7f + +struct sl28cpld_pwm { + struct pwm_chip pwm_chip; + struct regmap *regmap; + u32 offset; +}; + +struct sl28cpld_pwm_periods { + u8 ctrl; + unsigned long duty_cycle; +}; + +struct sl28cpld_pwm_config { + unsigned long period_ns; + u8 max_duty_cycle; +}; + +static struct sl28cpld_pwm_config sl28cpld_pwm_config[] = { + [PWM_MODE_250HZ] = { .period_ns = 4000000, .max_duty_cycle = 0x80 }, + [PWM_MODE_500HZ] = { .period_ns = 2000000, .max_duty_cycle = 0x40 }, + [PWM_MODE_1KHZ] = { .period_ns = 1000000, .max_duty_cycle = 0x20 }, + [PWM_MODE_2KHZ] = { .period_ns = 500000, .max_duty_cycle = 0x10 }, +}; + +static void sl28cpld_pwm_get_state(struct pwm_chip *chip, + struct pwm_device *pwm, + struct pwm_state *state) +{ + struct sl28cpld_pwm *priv = dev_get_drvdata(chip->dev); + static struct sl28cpld_pwm_config *config; + unsigned int reg; + unsigned int mode; + + regmap_read(priv->regmap, priv->offset + PWM_CTRL, ®); + + state->enabled = reg & PWM_ENABLE; + + mode = FIELD_GET(PWM_MODE_MASK, reg); + config = &sl28cpld_pwm_config[mode]; + state->period = config->period_ns; + + regmap_read(priv->regmap, priv->offset + PWM_CYCLE, ®); + pwm_set_relative_duty_cycle(state, reg, config->max_duty_cycle); +} + +static int sl28cpld_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) +{ + struct sl28cpld_pwm *priv = dev_get_drvdata(chip->dev); + struct sl28cpld_pwm_config *config; + unsigned int cycle; + int ret; + int mode; + u8 ctrl; + + /* Get the configuration by comparing the period */ + for (mode = 0; mode < ARRAY_SIZE(sl28cpld_pwm_config); mode++) { + config = &sl28cpld_pwm_config[mode]; + if (state->period == config->period_ns) + break; + } + + if (mode == ARRAY_SIZE(sl28cpld_pwm_config)) + return -EINVAL; + + ctrl = FIELD_PREP(PWM_MODE_MASK, mode); + if (state->enabled) + ctrl |= PWM_ENABLE; + + cycle = pwm_get_relative_duty_cycle(state, config->max_duty_cycle); + + /* + * The hardware doesn't allow to set max_duty_cycle if the + * 250Hz mode is enabled, thus we have to trap that here. + * But because a 100% duty cycle is equal on all modes, i.e. + * it is just a "all-high" output, we trap any case with a + * 100% duty cycle and use the 500Hz mode. + */ + if (cycle == config->max_duty_cycle) { + ctrl &= ~PWM_MODE_MASK; + ctrl |= FIELD_PREP(PWM_MODE_MASK, PWM_MODE_500HZ); + cycle = PWM_CYCLE_MAX; + } + + ret = regmap_write(priv->regmap, priv->offset + PWM_CTRL, ctrl); + if (ret) + return ret; + + return regmap_write(priv->regmap, priv->offset + PWM_CYCLE, (u8)cycle); +} + +static const struct pwm_ops sl28cpld_pwm_ops = { + .apply = sl28cpld_pwm_apply, + .get_state = sl28cpld_pwm_get_state, + .owner = THIS_MODULE, +}; + +static int sl28cpld_pwm_probe(struct platform_device *pdev) +{ + struct sl28cpld_pwm *priv; + struct pwm_chip *chip; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!priv->regmap) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &priv->offset); + if (ret) + return -EINVAL; + + /* Initialize the pwm_chip structure */ + chip = &priv->pwm_chip; + chip->dev = &pdev->dev; + chip->ops = &sl28cpld_pwm_ops; + chip->base = -1; + chip->npwm = 1; + + ret = pwmchip_add(&priv->pwm_chip); + if (ret) + return ret; + + platform_set_drvdata(pdev, priv); + + return 0; +} + +static int sl28cpld_pwm_remove(struct platform_device *pdev) +{ + struct sl28cpld_pwm *priv = platform_get_drvdata(pdev); + + return pwmchip_remove(&priv->pwm_chip); +} + +static const struct of_device_id sl28cpld_pwm_of_match[] = { + { .compatible = "kontron,sl28cpld-pwm" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_pwm_of_match); + +static struct platform_driver sl28cpld_pwm_driver = { + .probe = sl28cpld_pwm_probe, + .remove = sl28cpld_pwm_remove, + .driver = { + .name = "sl28cpld-pwm", + .of_match_table = sl28cpld_pwm_of_match, + }, +}; +module_platform_driver(sl28cpld_pwm_driver); + +MODULE_DESCRIPTION("sl28cpld PWM Driver"); +MODULE_AUTHOR("Michael Walle <michael@walle.cc>"); +MODULE_LICENSE("GPL"); -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-06 17:58 UTC|newest] Thread overview: 107+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-06 17:53 [PATCH v5 00/13] Add support for Kontron sl28cpld Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-06 17:53 ` [PATCH v5 01/13] regmap-irq: use fwnode instead of device node in add_irq_chip() Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-08 10:22 ` Mark Brown 2020-07-08 10:22 ` Mark Brown 2020-07-08 10:22 ` Mark Brown 2020-07-06 17:53 ` [PATCH v5 02/13] mfd: add simple regmap based I2C driver Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-17 9:04 ` Lee Jones 2020-07-17 9:04 ` Lee Jones 2020-07-17 9:04 ` Lee Jones 2020-07-19 22:25 ` Michael Walle 2020-07-19 22:25 ` Michael Walle 2020-07-19 22:25 ` Michael Walle 2020-07-17 9:06 ` Lee Jones 2020-07-17 9:06 ` Lee Jones 2020-07-17 9:06 ` Lee Jones 2020-07-19 22:31 ` Michael Walle 2020-07-19 22:31 ` Michael Walle 2020-07-19 22:31 ` Michael Walle 2020-07-20 7:43 ` Lee Jones 2020-07-20 7:43 ` Lee Jones 2020-07-20 7:43 ` Lee Jones 2020-07-06 17:53 ` [PATCH v5 03/13] dt-bindings: mfd: Add bindings for sl28cpld Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-13 16:04 ` Rob Herring 2020-07-13 16:04 ` Rob Herring 2020-07-13 16:04 ` Rob Herring 2020-07-06 17:53 ` [PATCH v5 04/13] mfd: simple-mfd-i2c: add sl28cpld support Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-06 17:53 ` [PATCH v5 05/13] irqchip: add sl28cpld interrupt controller support Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-08 9:37 ` Marc Zyngier 2020-07-08 9:37 ` Marc Zyngier 2020-07-08 9:37 ` Marc Zyngier 2020-07-06 17:53 ` [PATCH v5 06/13] watchdog: add support for sl28cpld watchdog Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-06 17:53 ` Michael Walle [this message] 2020-07-06 17:53 ` [PATCH v5 07/13] pwm: add support for sl28cpld PWM controller Michael Walle 2020-07-09 8:50 ` Uwe Kleine-König 2020-07-09 8:50 ` Uwe Kleine-König 2020-07-09 8:50 ` Uwe Kleine-König 2020-07-11 17:28 ` Michael Walle 2020-07-11 17:28 ` Michael Walle 2020-07-11 17:28 ` Michael Walle 2020-07-13 8:47 ` Uwe Kleine-König 2020-07-13 8:47 ` Uwe Kleine-König 2020-07-13 8:47 ` Uwe Kleine-König 2020-07-14 11:31 ` Michael Walle 2020-07-14 11:31 ` Michael Walle 2020-07-14 11:31 ` Michael Walle 2020-07-14 16:08 ` Uwe Kleine-König 2020-07-14 16:08 ` Uwe Kleine-König 2020-07-14 16:08 ` Uwe Kleine-König 2020-07-14 21:09 ` Michael Walle 2020-07-14 21:09 ` Michael Walle 2020-07-14 21:09 ` Michael Walle 2020-07-15 16:36 ` Uwe Kleine-König 2020-07-15 16:36 ` Uwe Kleine-König 2020-07-15 16:36 ` Uwe Kleine-König 2020-07-15 17:45 ` Michael Walle 2020-07-15 17:45 ` Michael Walle 2020-07-15 17:45 ` Michael Walle 2020-07-15 18:18 ` Uwe Kleine-König 2020-07-15 18:18 ` Uwe Kleine-König 2020-07-15 18:18 ` Uwe Kleine-König 2020-07-15 20:41 ` Michael Walle 2020-07-15 20:41 ` Michael Walle 2020-07-15 20:41 ` Michael Walle 2020-07-16 6:10 ` Uwe Kleine-König 2020-07-16 6:10 ` Uwe Kleine-König 2020-07-16 6:10 ` Uwe Kleine-König 2020-07-06 17:53 ` [PATCH v5 08/13] gpio: add support for the sl28cpld GPIO controller Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-08 7:35 ` Linus Walleij 2020-07-08 7:35 ` Linus Walleij 2020-07-08 7:35 ` Linus Walleij 2020-07-17 0:25 ` kernel test robot 2020-07-17 0:25 ` kernel test robot 2020-07-06 17:53 ` [PATCH v5 09/13] hwmon: add support for the sl28cpld hardware monitoring controller Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-06 17:53 ` [PATCH v5 10/13] arm64: dts: freescale: sl28: enable sl28cpld Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-06 17:53 ` [PATCH v5 11/13] arm64: dts: freescale: sl28: map GPIOs to input events Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-06 17:53 ` [PATCH v5 12/13] arm64: dts: freescale: sl28: enable LED support Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-17 8:36 ` Pavel Machek 2020-07-17 8:36 ` Pavel Machek 2020-07-17 8:36 ` Pavel Machek 2020-07-17 21:54 ` Michael Walle 2020-07-17 21:54 ` Michael Walle 2020-07-17 21:54 ` Michael Walle 2020-07-06 17:53 ` [PATCH v5 13/13] arm64: dts: freescale: sl28: enable fan support Michael Walle 2020-07-06 17:53 ` Michael Walle 2020-07-08 7:39 ` Linus Walleij 2020-07-08 7:39 ` Linus Walleij 2020-07-08 7:39 ` Linus Walleij 2020-07-08 7:56 ` Michael Walle 2020-07-08 7:56 ` Michael Walle 2020-07-08 7:56 ` Michael Walle 2020-07-08 17:00 ` [PATCH v5 00/13] Add support for Kontron sl28cpld Mark Brown 2020-07-08 17:00 ` Mark Brown
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