From: Mathieu Poirier <mathieu.poirier@linaro.org> To: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>, linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org, mike.leach@linaro.org, lcherian@marvell.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH V3 08/14] coresight: core: Add support for dedicated percpu sinks Date: Tue, 16 Feb 2021 13:44:19 -0700 [thread overview] Message-ID: <20210216204419.GB2936551@xps15> (raw) In-Reply-To: <72bd5139-a6e1-64c0-c111-818bc04a81b8@arm.com> On Tue, Feb 16, 2021 at 04:10:18PM +0530, Anshuman Khandual wrote: > > > On 2/5/21 12:04 AM, Mathieu Poirier wrote: > > On Thu, Jan 28, 2021 at 09:16:34AM +0000, Suzuki K Poulose wrote: > >> On 1/27/21 8:55 AM, Anshuman Khandual wrote: > >>> Add support for dedicated sinks that are bound to individual CPUs. (e.g, > >>> TRBE). To allow quicker access to the sink for a given CPU bound source, > >>> keep a percpu array of the sink devices. Also, add support for building > >>> a path to the CPU local sink from the ETM. > >>> > >>> This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM. > >>> This new sink type is exclusively available and can only work with percpu > >>> source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PERCPU_PROC. > >>> > >>> This defines a percpu structure that accommodates a single coresight_device > >>> which can be used to store an initialized instance from a sink driver. As > >>> these sinks are exclusively linked and dependent on corresponding percpu > >>> sources devices, they should also be the default sink device during a perf > >>> session. > >>> > >>> Outwards device connections are scanned while establishing paths between a > >>> source and a sink device. But such connections are not present for certain > >>> percpu source and sink devices which are exclusively linked and dependent. > >>> Build the path directly and skip connection scanning for such devices. > >>> > >>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > >>> Cc: Mike Leach <mike.leach@linaro.org> > >>> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> > >>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> > >>> --- > >>> Changes in V3: > >>> > >>> - Updated coresight_find_default_sink() > >>> > >>> drivers/hwtracing/coresight/coresight-core.c | 16 ++++++++++++++-- > >>> include/linux/coresight.h | 12 ++++++++++++ > >>> 2 files changed, 26 insertions(+), 2 deletions(-) > >>> > >>> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > >>> index 0062c89..4795e28 100644 > >>> --- a/drivers/hwtracing/coresight/coresight-core.c > >>> +++ b/drivers/hwtracing/coresight/coresight-core.c > >>> @@ -23,6 +23,7 @@ > >>> #include "coresight-priv.h" > >>> static DEFINE_MUTEX(coresight_mutex); > >>> +DEFINE_PER_CPU(struct coresight_device *, csdev_sink); > >>> /** > >>> * struct coresight_node - elements of a path, from source to sink > >>> @@ -784,6 +785,13 @@ static int _coresight_build_path(struct coresight_device *csdev, > >>> if (csdev == sink) > >>> goto out; > >>> + if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && > >>> + sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { > >>> + _coresight_build_path(sink, sink, path); > > > > The return value for _coresight_build_path() needs to be checked. Otherwise a > > failure to allocate a node for the sink will go unoticed and make for a very > > hard problem to debug. > > How about this instead ? > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 4795e28..e93e669 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -787,9 +787,10 @@ static int _coresight_build_path(struct coresight_device *csdev, > > if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && > sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { > - _coresight_build_path(sink, sink, path); > - found = true; > - goto out; > + if (_coresight_build_path(sink, sink, path) == 0) { > + found = true; > + goto out; > + } I am missing the context now but it is a step in the right direction. I will re-assess on your next revision. > } > > /* Not a sink - recursively explore each port found on this element */ > > > > >>> + found = true; > >>> + goto out; > >>> + } > >>> + > >>> /* Not a sink - recursively explore each port found on this element */ > >>> for (i = 0; i < csdev->pdata->nr_outport; i++) { > >>> struct coresight_device *child_dev; > >>> @@ -999,8 +1007,12 @@ coresight_find_default_sink(struct coresight_device *csdev) > >>> int depth = 0; > >>> /* look for a default sink if we have not found for this device */ > >>> - if (!csdev->def_sink) > >>> - csdev->def_sink = coresight_find_sink(csdev, &depth); > >>> + if (!csdev->def_sink) { > >>> + if (coresight_is_percpu_source(csdev)) > >>> + csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); > >>> + if (!csdev->def_sink) > >>> + csdev->def_sink = coresight_find_sink(csdev, &depth); > >>> + } > >>> return csdev->def_sink; > >>> } > >>> diff --git a/include/linux/coresight.h b/include/linux/coresight.h > >>> index 976ec26..bc3a5ca 100644 > >>> --- a/include/linux/coresight.h > >>> +++ b/include/linux/coresight.h > >>> @@ -50,6 +50,7 @@ enum coresight_dev_subtype_sink { > >>> CORESIGHT_DEV_SUBTYPE_SINK_PORT, > >>> CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, > >>> CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM, > >>> + CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM, > > > > Do we absolutely need to add a new sink type? It is only used in > > _coresight_build_path() and that code could be: > > > > if (coresight_is_percpu_source(csdev)) { > > sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); > > Do you mean if (sink == per_cpu(...)) above ? > > > if (sink && sink == csdev) { > > How could the sink fetched from the source csdev be the same ? The above should have been: if (coresight_is_percpu_source(csdev)) { per_cpu_sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); if (per_cpu_sink && per_cpu_sink == sink) { Apologies for the confusion. Mathieu > > I would still suggest keeping CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM for > logical separation between source and sink, which also improves clarity > and readability.
WARNING: multiple messages have this Message-ID (diff)
From: Mathieu Poirier <mathieu.poirier@linaro.org> To: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lcherian@marvell.com, mike.leach@linaro.org Subject: Re: [PATCH V3 08/14] coresight: core: Add support for dedicated percpu sinks Date: Tue, 16 Feb 2021 13:44:19 -0700 [thread overview] Message-ID: <20210216204419.GB2936551@xps15> (raw) In-Reply-To: <72bd5139-a6e1-64c0-c111-818bc04a81b8@arm.com> On Tue, Feb 16, 2021 at 04:10:18PM +0530, Anshuman Khandual wrote: > > > On 2/5/21 12:04 AM, Mathieu Poirier wrote: > > On Thu, Jan 28, 2021 at 09:16:34AM +0000, Suzuki K Poulose wrote: > >> On 1/27/21 8:55 AM, Anshuman Khandual wrote: > >>> Add support for dedicated sinks that are bound to individual CPUs. (e.g, > >>> TRBE). To allow quicker access to the sink for a given CPU bound source, > >>> keep a percpu array of the sink devices. Also, add support for building > >>> a path to the CPU local sink from the ETM. > >>> > >>> This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM. > >>> This new sink type is exclusively available and can only work with percpu > >>> source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PERCPU_PROC. > >>> > >>> This defines a percpu structure that accommodates a single coresight_device > >>> which can be used to store an initialized instance from a sink driver. As > >>> these sinks are exclusively linked and dependent on corresponding percpu > >>> sources devices, they should also be the default sink device during a perf > >>> session. > >>> > >>> Outwards device connections are scanned while establishing paths between a > >>> source and a sink device. But such connections are not present for certain > >>> percpu source and sink devices which are exclusively linked and dependent. > >>> Build the path directly and skip connection scanning for such devices. > >>> > >>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > >>> Cc: Mike Leach <mike.leach@linaro.org> > >>> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> > >>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> > >>> --- > >>> Changes in V3: > >>> > >>> - Updated coresight_find_default_sink() > >>> > >>> drivers/hwtracing/coresight/coresight-core.c | 16 ++++++++++++++-- > >>> include/linux/coresight.h | 12 ++++++++++++ > >>> 2 files changed, 26 insertions(+), 2 deletions(-) > >>> > >>> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > >>> index 0062c89..4795e28 100644 > >>> --- a/drivers/hwtracing/coresight/coresight-core.c > >>> +++ b/drivers/hwtracing/coresight/coresight-core.c > >>> @@ -23,6 +23,7 @@ > >>> #include "coresight-priv.h" > >>> static DEFINE_MUTEX(coresight_mutex); > >>> +DEFINE_PER_CPU(struct coresight_device *, csdev_sink); > >>> /** > >>> * struct coresight_node - elements of a path, from source to sink > >>> @@ -784,6 +785,13 @@ static int _coresight_build_path(struct coresight_device *csdev, > >>> if (csdev == sink) > >>> goto out; > >>> + if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && > >>> + sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { > >>> + _coresight_build_path(sink, sink, path); > > > > The return value for _coresight_build_path() needs to be checked. Otherwise a > > failure to allocate a node for the sink will go unoticed and make for a very > > hard problem to debug. > > How about this instead ? > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 4795e28..e93e669 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -787,9 +787,10 @@ static int _coresight_build_path(struct coresight_device *csdev, > > if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && > sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { > - _coresight_build_path(sink, sink, path); > - found = true; > - goto out; > + if (_coresight_build_path(sink, sink, path) == 0) { > + found = true; > + goto out; > + } I am missing the context now but it is a step in the right direction. I will re-assess on your next revision. > } > > /* Not a sink - recursively explore each port found on this element */ > > > > >>> + found = true; > >>> + goto out; > >>> + } > >>> + > >>> /* Not a sink - recursively explore each port found on this element */ > >>> for (i = 0; i < csdev->pdata->nr_outport; i++) { > >>> struct coresight_device *child_dev; > >>> @@ -999,8 +1007,12 @@ coresight_find_default_sink(struct coresight_device *csdev) > >>> int depth = 0; > >>> /* look for a default sink if we have not found for this device */ > >>> - if (!csdev->def_sink) > >>> - csdev->def_sink = coresight_find_sink(csdev, &depth); > >>> + if (!csdev->def_sink) { > >>> + if (coresight_is_percpu_source(csdev)) > >>> + csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); > >>> + if (!csdev->def_sink) > >>> + csdev->def_sink = coresight_find_sink(csdev, &depth); > >>> + } > >>> return csdev->def_sink; > >>> } > >>> diff --git a/include/linux/coresight.h b/include/linux/coresight.h > >>> index 976ec26..bc3a5ca 100644 > >>> --- a/include/linux/coresight.h > >>> +++ b/include/linux/coresight.h > >>> @@ -50,6 +50,7 @@ enum coresight_dev_subtype_sink { > >>> CORESIGHT_DEV_SUBTYPE_SINK_PORT, > >>> CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, > >>> CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM, > >>> + CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM, > > > > Do we absolutely need to add a new sink type? It is only used in > > _coresight_build_path() and that code could be: > > > > if (coresight_is_percpu_source(csdev)) { > > sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); > > Do you mean if (sink == per_cpu(...)) above ? > > > if (sink && sink == csdev) { > > How could the sink fetched from the source csdev be the same ? The above should have been: if (coresight_is_percpu_source(csdev)) { per_cpu_sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); if (per_cpu_sink && per_cpu_sink == sink) { Apologies for the confusion. Mathieu > > I would still suggest keeping CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM for > logical separation between source and sink, which also improves clarity > and readability. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-02-16 20:45 UTC|newest] Thread overview: 181+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-27 8:55 [PATCH V3 00/14] arm64: coresight: Enable ETE and TRBE Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-01-27 8:55 ` [PATCH V3 01/14] coresight: etm-perf: Allow an event to use different sinks Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-02-01 23:17 ` Mathieu Poirier 2021-02-01 23:17 ` Mathieu Poirier 2021-02-02 9:42 ` Suzuki K Poulose 2021-02-02 9:42 ` Suzuki K Poulose 2021-02-02 16:33 ` Mike Leach 2021-02-02 16:33 ` Mike Leach 2021-02-02 22:41 ` Suzuki K Poulose 2021-02-02 22:41 ` Suzuki K Poulose 2021-02-04 12:27 ` Mike Leach 2021-02-04 12:27 ` Mike Leach 2021-02-02 16:37 ` Mathieu Poirier 2021-02-02 16:37 ` Mathieu Poirier 2021-01-27 8:55 ` [PATCH V3 02/14] coresight: Do not scan for graph if none is present Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-02-01 23:44 ` Mathieu Poirier 2021-02-01 23:44 ` Mathieu Poirier 2021-02-02 11:10 ` Mike Leach 2021-02-02 11:10 ` Mike Leach 2021-02-02 14:36 ` Suzuki K Poulose 2021-02-02 14:36 ` Suzuki K Poulose 2021-01-27 8:55 ` [PATCH V3 03/14] coresight: etm4x: Add support for PE OS lock Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-02-02 17:40 ` Mathieu Poirier 2021-02-02 17:40 ` Mathieu Poirier 2021-02-02 18:03 ` Mathieu Poirier 2021-02-02 18:03 ` Mathieu Poirier 2021-02-15 14:08 ` Mike Leach 2021-02-15 14:08 ` Mike Leach 2021-01-27 8:55 ` [PATCH V3 04/14] coresight: ete: Add support for ETE sysreg access Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-02-02 17:52 ` Mathieu Poirier 2021-02-02 17:52 ` Mathieu Poirier 2021-02-03 15:51 ` Suzuki K Poulose 2021-02-03 15:51 ` Suzuki K Poulose 2021-02-15 14:08 ` Mike Leach 2021-02-15 14:08 ` Mike Leach 2021-01-27 8:55 ` [PATCH V3 05/14] coresight: ete: Add support for ETE tracing Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-02-02 18:56 ` Mathieu Poirier 2021-02-02 18:56 ` Mathieu Poirier 2021-02-02 22:50 ` Suzuki K Poulose 2021-02-02 22:50 ` Suzuki K Poulose 2021-02-15 13:21 ` Mike Leach 2021-02-15 13:21 ` Mike Leach 2021-02-15 14:08 ` Mike Leach 2021-02-15 14:08 ` Mike Leach 2021-01-27 8:55 ` [PATCH V3 06/14] dts: bindings: Document device tree bindings for ETE Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-02-09 19:00 ` Rob Herring 2021-02-09 19:00 ` Rob Herring 2021-02-10 12:33 ` Suzuki K Poulose 2021-02-10 12:33 ` Suzuki K Poulose 2021-02-18 18:33 ` Rob Herring 2021-02-18 18:33 ` Rob Herring 2021-02-18 22:51 ` Suzuki K Poulose 2021-02-18 22:51 ` Suzuki K Poulose 2021-01-27 8:55 ` [PATCH V3 07/14] coresight: etm-perf: Handle stale output handles Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-02-03 19:05 ` Mathieu Poirier 2021-02-03 19:05 ` Mathieu Poirier 2021-02-03 23:36 ` Suzuki K Poulose 2021-02-03 23:36 ` Suzuki K Poulose 2021-02-15 16:27 ` Mike Leach 2021-02-15 16:27 ` Mike Leach 2021-01-27 8:55 ` [PATCH V3 08/14] coresight: core: Add support for dedicated percpu sinks Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-01-28 9:16 ` Suzuki K Poulose 2021-01-28 9:16 ` Suzuki K Poulose 2021-02-04 18:34 ` Mathieu Poirier 2021-02-04 18:34 ` Mathieu Poirier 2021-02-16 10:40 ` Anshuman Khandual 2021-02-16 10:40 ` Anshuman Khandual 2021-02-16 20:44 ` Mathieu Poirier [this message] 2021-02-16 20:44 ` Mathieu Poirier 2021-02-16 10:21 ` Anshuman Khandual 2021-02-16 10:21 ` Anshuman Khandual 2021-02-15 16:27 ` Mike Leach 2021-02-15 16:27 ` Mike Leach 2021-02-15 16:56 ` Mathieu Poirier 2021-02-15 16:56 ` Mathieu Poirier 2021-02-15 17:58 ` Mike Leach 2021-02-15 17:58 ` Mike Leach 2021-02-16 20:30 ` Mathieu Poirier 2021-02-16 20:30 ` Mathieu Poirier 2021-01-27 8:55 ` [PATCH V3 09/14] arm64: Add TRBE definitions Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-01-28 9:31 ` Suzuki K Poulose 2021-01-28 9:31 ` Suzuki K Poulose 2021-01-28 17:18 ` Catalin Marinas 2021-01-28 17:18 ` Catalin Marinas 2021-02-15 18:06 ` Mike Leach 2021-02-15 18:06 ` Mike Leach 2021-01-27 8:55 ` [PATCH V3 10/14] arm64: nvhe: Allow TRBE access at EL1 Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-01-27 9:58 ` Marc Zyngier 2021-01-27 9:58 ` Marc Zyngier 2021-01-28 9:34 ` Suzuki K Poulose 2021-01-28 9:34 ` Suzuki K Poulose 2021-01-28 9:46 ` Marc Zyngier 2021-01-28 9:46 ` Marc Zyngier 2021-01-28 9:48 ` Suzuki K Poulose 2021-01-28 9:48 ` Suzuki K Poulose 2021-01-27 8:55 ` [PATCH V3 11/14] coresight: sink: Add TRBE driver Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-01-29 10:23 ` Suzuki K Poulose 2021-02-02 5:55 ` Anshuman Khandual 2021-02-02 5:55 ` Anshuman Khandual 2021-02-05 17:53 ` Mathieu Poirier 2021-02-05 17:53 ` Mathieu Poirier 2021-02-08 4:20 ` Anshuman Khandual 2021-02-08 4:20 ` Anshuman Khandual 2021-02-09 17:39 ` Mathieu Poirier 2021-02-09 17:39 ` Mathieu Poirier 2021-02-10 4:12 ` Anshuman Khandual 2021-02-10 4:12 ` Anshuman Khandual 2021-02-10 16:54 ` Mathieu Poirier 2021-02-10 16:54 ` Mathieu Poirier 2021-02-10 19:00 ` Mathieu Poirier 2021-02-10 19:00 ` Mathieu Poirier 2021-02-12 5:43 ` Anshuman Khandual 2021-02-12 5:43 ` Anshuman Khandual 2021-02-12 17:02 ` Mathieu Poirier 2021-02-12 17:02 ` Mathieu Poirier 2021-02-11 19:00 ` Mathieu Poirier 2021-02-11 19:00 ` Mathieu Poirier 2021-02-12 3:31 ` Anshuman Khandual 2021-02-12 3:31 ` Anshuman Khandual 2021-02-12 16:57 ` Mathieu Poirier 2021-02-12 16:57 ` Mathieu Poirier 2021-02-15 9:26 ` Anshuman Khandual 2021-02-15 9:26 ` Anshuman Khandual 2021-02-12 20:26 ` Mathieu Poirier 2021-02-12 20:26 ` Mathieu Poirier 2021-02-15 9:46 ` Anshuman Khandual 2021-02-15 9:46 ` Anshuman Khandual 2021-02-16 9:00 ` Mike Leach 2021-02-16 9:00 ` Mike Leach 2021-02-16 9:44 ` Anshuman Khandual 2021-02-16 9:44 ` Anshuman Khandual 2021-02-16 12:12 ` Mike Leach 2021-02-16 12:12 ` Mike Leach 2021-02-18 7:50 ` Suzuki K Poulose 2021-02-18 7:50 ` Suzuki K Poulose 2021-02-18 14:30 ` Mike Leach 2021-02-18 14:30 ` Mike Leach 2021-02-18 15:14 ` Suzuki K Poulose 2021-02-18 15:14 ` Suzuki K Poulose 2021-02-22 10:42 ` Mike Leach 2021-02-22 10:42 ` Mike Leach 2021-01-27 8:55 ` [PATCH V3 12/14] dts: bindings: Document device tree bindings for Arm TRBE Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-02-09 19:04 ` Rob Herring 2021-02-09 19:04 ` Rob Herring 2021-01-27 8:55 ` [PATCH V3 13/14] perf: aux: Add flags for the buffer format Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-01-27 12:51 ` Peter Zijlstra 2021-01-27 12:51 ` Peter Zijlstra 2021-02-16 10:59 ` Mike Leach 2021-02-16 10:59 ` Mike Leach 2021-01-27 8:55 ` [PATCH V3 14/14] coresight: etm-perf: Add support for trace " Anshuman Khandual 2021-01-27 8:55 ` Anshuman Khandual 2021-01-27 12:54 ` Peter Zijlstra 2021-01-27 12:54 ` Peter Zijlstra 2021-01-27 13:00 ` Al Grant 2021-01-27 13:00 ` Al Grant 2021-02-18 3:05 ` Anshuman Khandual 2021-02-18 3:05 ` Anshuman Khandual 2021-01-27 14:12 ` Suzuki K Poulose 2021-01-27 14:12 ` Suzuki K Poulose 2021-02-16 11:01 ` Mike Leach 2021-02-16 11:01 ` Mike Leach 2021-01-27 18:50 ` [PATCH V3 00/14] arm64: coresight: Enable ETE and TRBE Mathieu Poirier 2021-01-27 18:50 ` Mathieu Poirier 2021-02-01 18:44 ` Mathieu Poirier 2021-02-01 18:44 ` Mathieu Poirier 2021-02-18 4:23 ` Anshuman Khandual 2021-02-18 4:23 ` Anshuman Khandual
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