From: Yifei Jiang <jiangyifei@huawei.com>
To: <qemu-devel@nongnu.org>, <qemu-riscv@nongnu.org>
Cc: <kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>,
<libvir-list@redhat.com>, <anup@brainfault.org>,
<palmer@dabbelt.com>, <Alistair.Francis@wdc.com>,
<bin.meng@windriver.com>, <fanliang@huawei.com>,
<wu.wubin@huawei.com>, <wanghaibin.wang@huawei.com>,
<wanbo13@huawei.com>, Yifei Jiang <jiangyifei@huawei.com>,
Mingwang Li <limingwang@huawei.com>,
Anup Patel <anup.patel@wdc.com>,
Alistair Francis <alistair.francis@wdc.com>
Subject: [PATCH v5 11/13] target/riscv: Implement virtual time adjusting with vm state changing
Date: Wed, 12 Jan 2022 16:13:27 +0800 [thread overview]
Message-ID: <20220112081329.1835-12-jiangyifei@huawei.com> (raw)
In-Reply-To: <20220112081329.1835-1-jiangyifei@huawei.com>
We hope that virtual time adjusts with vm state changing. When a vm
is stopped, guest virtual time should stop counting and kvm_timer
should be stopped. When the vm is resumed, guest virtual time should
continue to count and kvm_timer should be restored.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Mingwang Li <limingwang@huawei.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/kvm.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index a43d5a2988..e6b7cb6d4d 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -41,6 +41,7 @@
#include "sbi_ecall_interface.h"
#include "chardev/char-fe.h"
#include "migration/migration.h"
+#include "sysemu/runstate.h"
static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
uint64_t idx)
@@ -378,6 +379,18 @@ unsigned long kvm_arch_vcpu_id(CPUState *cpu)
return cpu->cpu_index;
}
+static void kvm_riscv_vm_state_change(void *opaque, bool running,
+ RunState state)
+{
+ CPUState *cs = opaque;
+
+ if (running) {
+ kvm_riscv_put_regs_timer(cs);
+ } else {
+ kvm_riscv_get_regs_timer(cs);
+ }
+}
+
void kvm_arch_init_irq_routing(KVMState *s)
{
}
@@ -390,6 +403,8 @@ int kvm_arch_init_vcpu(CPUState *cs)
CPURISCVState *env = &cpu->env;
uint64_t id;
+ qemu_add_vm_change_state_handler(kvm_riscv_vm_state_change, cs);
+
id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
KVM_REG_RISCV_CONFIG_REG(isa));
ret = kvm_get_one_reg(cs, id, &isa);
--
2.19.1
WARNING: multiple messages have this Message-ID (diff)
From: Yifei Jiang via <qemu-devel@nongnu.org>
To: <qemu-devel@nongnu.org>, <qemu-riscv@nongnu.org>
Cc: <kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>,
<libvir-list@redhat.com>, <anup@brainfault.org>,
<palmer@dabbelt.com>, <Alistair.Francis@wdc.com>,
<bin.meng@windriver.com>, <fanliang@huawei.com>,
<wu.wubin@huawei.com>, <wanghaibin.wang@huawei.com>,
<wanbo13@huawei.com>, Yifei Jiang <jiangyifei@huawei.com>,
Mingwang Li <limingwang@huawei.com>,
Anup Patel <anup.patel@wdc.com>,
Alistair Francis <alistair.francis@wdc.com>
Subject: [PATCH v5 11/13] target/riscv: Implement virtual time adjusting with vm state changing
Date: Wed, 12 Jan 2022 16:13:27 +0800 [thread overview]
Message-ID: <20220112081329.1835-12-jiangyifei@huawei.com> (raw)
In-Reply-To: <20220112081329.1835-1-jiangyifei@huawei.com>
We hope that virtual time adjusts with vm state changing. When a vm
is stopped, guest virtual time should stop counting and kvm_timer
should be stopped. When the vm is resumed, guest virtual time should
continue to count and kvm_timer should be restored.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Mingwang Li <limingwang@huawei.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/kvm.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index a43d5a2988..e6b7cb6d4d 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -41,6 +41,7 @@
#include "sbi_ecall_interface.h"
#include "chardev/char-fe.h"
#include "migration/migration.h"
+#include "sysemu/runstate.h"
static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
uint64_t idx)
@@ -378,6 +379,18 @@ unsigned long kvm_arch_vcpu_id(CPUState *cpu)
return cpu->cpu_index;
}
+static void kvm_riscv_vm_state_change(void *opaque, bool running,
+ RunState state)
+{
+ CPUState *cs = opaque;
+
+ if (running) {
+ kvm_riscv_put_regs_timer(cs);
+ } else {
+ kvm_riscv_get_regs_timer(cs);
+ }
+}
+
void kvm_arch_init_irq_routing(KVMState *s)
{
}
@@ -390,6 +403,8 @@ int kvm_arch_init_vcpu(CPUState *cs)
CPURISCVState *env = &cpu->env;
uint64_t id;
+ qemu_add_vm_change_state_handler(kvm_riscv_vm_state_change, cs);
+
id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
KVM_REG_RISCV_CONFIG_REG(isa));
ret = kvm_get_one_reg(cs, id, &isa);
--
2.19.1
next prev parent reply other threads:[~2022-01-12 8:14 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-12 8:13 [PATCH v5 00/13] Add riscv kvm accel support Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 01/13] update-linux-headers: Add asm-riscv/kvm.h Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 02/13] target/riscv: Add target/riscv/kvm.c to place the public kvm interface Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 03/13] target/riscv: Implement function kvm_arch_init_vcpu Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 04/13] target/riscv: Implement kvm_arch_get_registers Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 05/13] target/riscv: Implement kvm_arch_put_registers Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 06/13] target/riscv: Support start kernel directly by KVM Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-13 4:35 ` Anup Patel
2022-01-13 4:35 ` Anup Patel
2022-01-12 8:13 ` [PATCH v5 07/13] target/riscv: Support setting external interrupt " Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 08/13] target/riscv: Handle KVM_EXIT_RISCV_SBI exit Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 09/13] target/riscv: Add host cpu type Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 10/13] target/riscv: Add kvm_riscv_get/put_regs_timer Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` Yifei Jiang [this message]
2022-01-12 8:13 ` [PATCH v5 11/13] target/riscv: Implement virtual time adjusting with vm state changing Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 12/13] target/riscv: Support virtual time context synchronization Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-12 8:13 ` [PATCH v5 13/13] target/riscv: enable riscv kvm accel Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang via
2022-01-13 4:30 ` Alistair Francis
2022-01-13 4:30 ` Alistair Francis
2022-01-13 4:41 ` Anup Patel
2022-01-13 4:41 ` Anup Patel
2022-01-17 22:48 ` [PATCH v5 00/13] Add riscv kvm accel support Alistair Francis
2022-01-17 22:48 ` Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220112081329.1835-12-jiangyifei@huawei.com \
--to=jiangyifei@huawei.com \
--cc=Alistair.Francis@wdc.com \
--cc=anup.patel@wdc.com \
--cc=anup@brainfault.org \
--cc=bin.meng@windriver.com \
--cc=fanliang@huawei.com \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=libvir-list@redhat.com \
--cc=limingwang@huawei.com \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=wanbo13@huawei.com \
--cc=wanghaibin.wang@huawei.com \
--cc=wu.wubin@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.