From: Andre Przywara <andre.przywara@arm.com> To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@gmail.com>, Samuel Holland <samuel@sholland.org> Cc: Rob Herring <robh+dt@kernel.org>, Mesih Kilinc <mesihkilinc@gmail.com>, Icenowy Zheng <icenowy@aosc.io>, Jesse Taube <mr.bossman075@gmail.com>, Giulio Benetti <giulio.benetti@benettiengineering.com>, George Hilliard <thirtythreeforty@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Ulf Hansson <ulf.hansson@linaro.org>, linux-mmc@vger.kernel.org Subject: [PATCH 08/14] ARM: dts: suniv: F1C100: add MMC controllers Date: Mon, 7 Mar 2022 14:34:15 +0000 [thread overview] Message-ID: <20220307143421.1106209-9-andre.przywara@arm.com> (raw) In-Reply-To: <20220307143421.1106209-1-andre.przywara@arm.com> From: Jesse Taube <mr.bossman075@gmail.com> The F1C100 series contains two MMC controllers, where the first one is typically connected to an (micro)SD card slot (as this is the one the BROM is able to boot from). Describe the two controllers in the SoC .dtsi. We also add the pinctrl description for MMC0, since this is the only pin set supporting that function anyway, and SD cards are very common across boards. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm/boot/dts/suniv-f1c100s.dtsi | 42 ++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi index 57f8932ef898..6f2f97458fe0 100644 --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi @@ -69,6 +69,42 @@ otg_sram: sram-section@0 { }; }; + mmc0: mmc@1c0f000 { + compatible = "allwinner,suniv-f1c100s-mmc", + "allwinner,sun7i-a20-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&ccu CLK_BUS_MMC0>, + <&ccu CLK_MMC0>, + <&ccu CLK_MMC0_OUTPUT>, + <&ccu CLK_MMC0_SAMPLE>; + clock-names = "ahb", "mmc", "output", "sample"; + resets = <&ccu RST_BUS_MMC0>; + reset-names = "ahb"; + interrupts = <23>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@1c10000 { + compatible = "allwinner,suniv-f1c100s-mmc", + "allwinner,sun7i-a20-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&ccu CLK_BUS_MMC1>, + <&ccu CLK_MMC1>, + <&ccu CLK_MMC1_OUTPUT>, + <&ccu CLK_MMC1_SAMPLE>; + clock-names = "ahb", "mmc", "output", "sample"; + resets = <&ccu RST_BUS_MMC1>; + reset-names = "ahb"; + interrupts = <24>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + ccu: clock@1c20000 { compatible = "allwinner,suniv-f1c100s-ccu"; reg = <0x01c20000 0x400>; @@ -96,6 +132,12 @@ pio: pinctrl@1c20800 { #interrupt-cells = <3>; #gpio-cells = <3>; + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; + function = "mmc0"; + drive-strength = <30>; + }; + uart0_pe_pins: uart0-pe-pins { pins = "PE0", "PE1"; function = "uart0"; -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com> To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@gmail.com>, Samuel Holland <samuel@sholland.org> Cc: Rob Herring <robh+dt@kernel.org>, Mesih Kilinc <mesihkilinc@gmail.com>, Icenowy Zheng <icenowy@aosc.io>, Jesse Taube <mr.bossman075@gmail.com>, Giulio Benetti <giulio.benetti@benettiengineering.com>, George Hilliard <thirtythreeforty@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Ulf Hansson <ulf.hansson@linaro.org>, linux-mmc@vger.kernel.org Subject: [PATCH 08/14] ARM: dts: suniv: F1C100: add MMC controllers Date: Mon, 7 Mar 2022 14:34:15 +0000 [thread overview] Message-ID: <20220307143421.1106209-9-andre.przywara@arm.com> (raw) In-Reply-To: <20220307143421.1106209-1-andre.przywara@arm.com> From: Jesse Taube <mr.bossman075@gmail.com> The F1C100 series contains two MMC controllers, where the first one is typically connected to an (micro)SD card slot (as this is the one the BROM is able to boot from). Describe the two controllers in the SoC .dtsi. We also add the pinctrl description for MMC0, since this is the only pin set supporting that function anyway, and SD cards are very common across boards. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm/boot/dts/suniv-f1c100s.dtsi | 42 ++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi index 57f8932ef898..6f2f97458fe0 100644 --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi @@ -69,6 +69,42 @@ otg_sram: sram-section@0 { }; }; + mmc0: mmc@1c0f000 { + compatible = "allwinner,suniv-f1c100s-mmc", + "allwinner,sun7i-a20-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&ccu CLK_BUS_MMC0>, + <&ccu CLK_MMC0>, + <&ccu CLK_MMC0_OUTPUT>, + <&ccu CLK_MMC0_SAMPLE>; + clock-names = "ahb", "mmc", "output", "sample"; + resets = <&ccu RST_BUS_MMC0>; + reset-names = "ahb"; + interrupts = <23>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@1c10000 { + compatible = "allwinner,suniv-f1c100s-mmc", + "allwinner,sun7i-a20-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&ccu CLK_BUS_MMC1>, + <&ccu CLK_MMC1>, + <&ccu CLK_MMC1_OUTPUT>, + <&ccu CLK_MMC1_SAMPLE>; + clock-names = "ahb", "mmc", "output", "sample"; + resets = <&ccu RST_BUS_MMC1>; + reset-names = "ahb"; + interrupts = <24>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + ccu: clock@1c20000 { compatible = "allwinner,suniv-f1c100s-ccu"; reg = <0x01c20000 0x400>; @@ -96,6 +132,12 @@ pio: pinctrl@1c20800 { #interrupt-cells = <3>; #gpio-cells = <3>; + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; + function = "mmc0"; + drive-strength = <30>; + }; + uart0_pe_pins: uart0-pe-pins { pins = "PE0", "PE1"; function = "uart0"; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-03-07 14:34 UTC|newest] Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-03-07 14:34 [PATCH 00/14] ARM: suniv: dts: update Allwinner F1C100 Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-07 14:34 ` [PATCH 01/14] dt-bindings: watchdog: sunxi: fix F1C100s compatible Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-08 16:08 ` Rob Herring 2022-03-08 16:08 ` Rob Herring 2022-03-09 23:02 ` Guenter Roeck 2022-03-09 23:02 ` Guenter Roeck 2022-03-10 0:46 ` Samuel Holland 2022-03-10 0:46 ` Samuel Holland 2022-03-14 17:39 ` Andre Przywara 2022-03-14 17:39 ` Andre Przywara 2022-03-07 14:34 ` [PATCH 02/14] ARM: dts: suniv: F1C100: fix watchdog compatible Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-09 23:03 ` Guenter Roeck 2022-03-09 23:03 ` Guenter Roeck 2022-03-07 14:34 ` [PATCH 03/14] dt-bindings: arm: sunxi: document LicheePi Nano name Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-08 16:09 ` Rob Herring 2022-03-08 16:09 ` Rob Herring 2022-03-11 1:27 ` Samuel Holland 2022-03-11 1:27 ` Samuel Holland 2022-03-07 14:34 ` [PATCH 04/14] ARM: dts: suniv: F1C100: add clock and reset macros Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-11 1:30 ` Samuel Holland 2022-03-11 1:30 ` Samuel Holland 2022-03-07 14:34 ` [PATCH 05/14] ARM: dts: suniv: F1C100: fix CPU node Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-08 2:44 ` Jesse Taube 2022-03-08 2:44 ` Jesse Taube 2022-03-08 4:23 ` Icenowy Zheng 2022-03-08 4:23 ` Icenowy Zheng 2022-03-08 10:42 ` Andre Przywara 2022-03-08 10:42 ` Andre Przywara 2022-03-07 14:34 ` [PATCH 06/14] ARM: dts: suniv: F1C100: fix timer node Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-11 2:19 ` Samuel Holland 2022-03-11 2:19 ` Samuel Holland 2022-03-07 14:34 ` [PATCH 07/14] dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-08 16:10 ` Rob Herring 2022-03-08 16:10 ` Rob Herring 2022-03-11 2:19 ` Samuel Holland 2022-03-11 2:19 ` Samuel Holland 2022-03-11 15:41 ` Ulf Hansson 2022-03-11 15:41 ` Ulf Hansson 2022-03-07 14:34 ` Andre Przywara [this message] 2022-03-07 14:34 ` [PATCH 08/14] ARM: dts: suniv: F1C100: add MMC controllers Andre Przywara 2022-03-11 2:19 ` Samuel Holland 2022-03-11 2:19 ` Samuel Holland 2022-03-07 14:34 ` [PATCH 09/14] ARM: dts: suniv: licheepi-nano: add microSD card Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-11 2:19 ` Samuel Holland 2022-03-11 2:19 ` Samuel Holland 2022-03-07 14:34 ` [PATCH 10/14] dt-bindings: spi: sunxi: document F1C100 controllers Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-08 16:10 ` Rob Herring 2022-03-08 16:10 ` Rob Herring 2022-03-11 2:19 ` Samuel Holland 2022-03-11 2:19 ` Samuel Holland 2022-03-07 14:34 ` [PATCH 11/14] ARM: dts: suniv: F1C100: add SPI support Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-11 2:19 ` Samuel Holland 2022-03-11 2:19 ` Samuel Holland 2022-03-11 13:33 ` Andre Przywara 2022-03-11 13:33 ` Andre Przywara 2022-03-07 14:34 ` [PATCH 12/14] ARM: dts: suniv: licheepi-nano: add SPI flash Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-11 2:20 ` Samuel Holland 2022-03-11 2:20 ` Samuel Holland 2022-03-07 14:34 ` [PATCH 13/14] ARM: configs: sync multi_v5_defconfig from savedefconfig Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-08 9:38 ` Arnd Bergmann 2022-03-08 9:38 ` Arnd Bergmann 2022-03-08 12:07 ` Andre Przywara 2022-03-08 12:07 ` Andre Przywara 2022-03-08 13:33 ` Arnd Bergmann 2022-03-08 13:33 ` Arnd Bergmann 2022-03-08 13:40 ` Arnd Bergmann 2022-03-08 13:40 ` Arnd Bergmann 2022-03-08 14:30 ` Nicolas Ferre 2022-03-08 14:30 ` Nicolas Ferre 2022-03-08 15:17 ` Arnd Bergmann 2022-03-08 15:17 ` Arnd Bergmann 2022-03-10 10:33 ` Andre Przywara 2022-03-10 10:33 ` Andre Przywara 2022-03-07 14:34 ` [PATCH 14/14] ARM: configs: multi_v5: Enable Allwinner F1C100 Andre Przywara 2022-03-07 14:34 ` Andre Przywara 2022-03-07 18:03 ` [PATCH 00/14] ARM: suniv: dts: update " Jesse Taube 2022-03-07 18:03 ` Jesse Taube 2022-03-07 18:22 ` Giulio Benetti 2022-03-07 18:22 ` Giulio Benetti 2022-03-11 1:38 ` Jesse Taube 2022-03-11 1:38 ` Jesse Taube
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