From: Hal Feng <hal.feng@starfivetech.com>
To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Ben Dooks <ben.dooks@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
Linus Walleij <linus.walleij@linaro.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Hal Feng <hal.feng@starfivetech.com>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v3 5/7] soc: sifive: ccache: Add StarFive JH7110 support
Date: Tue, 20 Dec 2022 09:12:45 +0800 [thread overview]
Message-ID: <20221220011247.35560-6-hal.feng@starfivetech.com> (raw)
In-Reply-To: <20221220011247.35560-1-hal.feng@starfivetech.com>
From: Emil Renner Berthing <kernel@esmil.dk>
This adds support for the StarFive JH7110 SoC which also
features this SiFive cache controller.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
drivers/soc/Makefile | 2 +-
drivers/soc/sifive/Kconfig | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 69ba6508cf2c..534669840858 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -26,7 +26,7 @@ obj-y += qcom/
obj-y += renesas/
obj-y += rockchip/
obj-$(CONFIG_SOC_SAMSUNG) += samsung/
-obj-$(CONFIG_SOC_SIFIVE) += sifive/
+obj-y += sifive/
obj-y += sunxi/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-y += ti/
diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig
index ed4c571f8771..e86870be34c9 100644
--- a/drivers/soc/sifive/Kconfig
+++ b/drivers/soc/sifive/Kconfig
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
-if SOC_SIFIVE
+if SOC_SIFIVE || SOC_STARFIVE
config SIFIVE_CCACHE
bool "Sifive Composable Cache controller"
--
2.38.1
WARNING: multiple messages have this Message-ID (diff)
From: Hal Feng <hal.feng@starfivetech.com>
To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Ben Dooks <ben.dooks@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
Linus Walleij <linus.walleij@linaro.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Hal Feng <hal.feng@starfivetech.com>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v3 5/7] soc: sifive: ccache: Add StarFive JH7110 support
Date: Tue, 20 Dec 2022 09:12:45 +0800 [thread overview]
Message-ID: <20221220011247.35560-6-hal.feng@starfivetech.com> (raw)
In-Reply-To: <20221220011247.35560-1-hal.feng@starfivetech.com>
From: Emil Renner Berthing <kernel@esmil.dk>
This adds support for the StarFive JH7110 SoC which also
features this SiFive cache controller.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
drivers/soc/Makefile | 2 +-
drivers/soc/sifive/Kconfig | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 69ba6508cf2c..534669840858 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -26,7 +26,7 @@ obj-y += qcom/
obj-y += renesas/
obj-y += rockchip/
obj-$(CONFIG_SOC_SAMSUNG) += samsung/
-obj-$(CONFIG_SOC_SIFIVE) += sifive/
+obj-y += sifive/
obj-y += sunxi/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-y += ti/
diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig
index ed4c571f8771..e86870be34c9 100644
--- a/drivers/soc/sifive/Kconfig
+++ b/drivers/soc/sifive/Kconfig
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
-if SOC_SIFIVE
+if SOC_SIFIVE || SOC_STARFIVE
config SIFIVE_CCACHE
bool "Sifive Composable Cache controller"
--
2.38.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-12-20 1:13 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-20 1:12 [PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 1:12 ` [PATCH v3 1/7] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 10:05 ` Krzysztof Kozlowski
2022-12-20 10:05 ` Krzysztof Kozlowski
2022-12-23 2:05 ` Hal Feng
2022-12-23 2:05 ` Hal Feng
2022-12-20 20:58 ` Conor Dooley
2022-12-20 20:58 ` Conor Dooley
2022-12-23 2:15 ` Hal Feng
2022-12-23 2:15 ` Hal Feng
2022-12-20 1:12 ` [PATCH v3 2/7] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 1:12 ` [PATCH v3 3/7] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 1:12 ` [PATCH v3 4/7] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 20:21 ` Rob Herring
2022-12-20 20:21 ` Rob Herring
2022-12-20 1:12 ` Hal Feng [this message]
2022-12-20 1:12 ` [PATCH v3 5/7] soc: sifive: ccache: Add StarFive JH7110 support Hal Feng
2022-12-20 21:14 ` Conor Dooley
2022-12-20 21:14 ` Conor Dooley
2022-12-20 1:12 ` [PATCH v3 6/7] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 10:10 ` Krzysztof Kozlowski
2022-12-20 10:10 ` Krzysztof Kozlowski
2022-12-25 10:31 ` Hal Feng
2022-12-25 10:31 ` Hal Feng
2022-12-25 11:56 ` Krzysztof Kozlowski
2022-12-25 11:56 ` Krzysztof Kozlowski
2022-12-20 21:31 ` Conor Dooley
2022-12-20 21:31 ` Conor Dooley
2022-12-25 14:31 ` Hal Feng
2022-12-25 14:31 ` Hal Feng
2022-12-27 20:58 ` Conor Dooley
2022-12-27 20:58 ` Conor Dooley
2022-12-28 22:48 ` Conor Dooley
2022-12-28 22:48 ` Conor Dooley
2022-12-29 5:25 ` Icenowy Zheng
2022-12-29 5:25 ` Icenowy Zheng
2022-12-29 9:02 ` Conor Dooley
2022-12-29 9:02 ` Conor Dooley
2023-02-01 7:53 ` Hal Feng
2023-02-01 7:53 ` Hal Feng
2023-02-01 7:31 ` Hal Feng
2023-02-01 7:31 ` Hal Feng
2023-02-01 7:21 ` Hal Feng
2023-02-01 7:21 ` Hal Feng
2023-02-01 8:21 ` Conor Dooley
2023-02-01 8:21 ` Conor Dooley
2023-02-02 18:56 ` Hal Feng
2023-02-02 18:56 ` Hal Feng
2023-02-02 19:41 ` Conor Dooley
2023-02-02 19:41 ` Conor Dooley
2023-02-09 11:11 ` Conor Dooley
2023-02-09 11:11 ` Conor Dooley
2023-02-13 9:41 ` Hal Feng
2023-02-13 9:41 ` Hal Feng
2023-02-13 10:07 ` Conor Dooley
2023-02-13 10:07 ` Conor Dooley
2023-02-14 2:37 ` Hal Feng
2023-02-14 2:37 ` Hal Feng
2023-02-15 3:07 ` Hal Feng
2023-02-15 3:07 ` Hal Feng
2023-02-15 7:42 ` Conor Dooley
2023-02-15 7:42 ` Conor Dooley
2023-02-15 7:59 ` Conor Dooley
2023-02-15 7:59 ` Conor Dooley
2023-01-31 2:00 ` Hal Feng
2023-01-31 2:00 ` Hal Feng
2023-01-31 6:17 ` Conor Dooley
2023-01-31 6:17 ` Conor Dooley
2023-02-02 2:42 ` Hal Feng
2023-02-02 2:42 ` Hal Feng
2023-02-02 6:19 ` Conor Dooley
2023-02-02 6:19 ` Conor Dooley
2022-12-20 1:12 ` [PATCH v3 7/7] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board " Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 21:26 ` Conor Dooley
2022-12-20 21:26 ` Conor Dooley
2022-12-23 3:12 ` Hal Feng
2022-12-23 3:12 ` Hal Feng
2022-12-28 22:49 ` Conor Dooley
2022-12-28 22:49 ` Conor Dooley
2023-01-10 17:59 ` Conor Dooley
2023-01-10 17:59 ` Conor Dooley
2023-01-18 23:43 ` Conor Dooley
2023-01-18 23:43 ` Conor Dooley
2023-02-14 9:53 ` Emil Renner Berthing
2023-02-14 9:53 ` Emil Renner Berthing
2023-02-15 14:03 ` Hal Feng
2023-02-15 14:03 ` Hal Feng
2023-02-16 9:27 ` Emil Renner Berthing
2023-02-16 9:27 ` Emil Renner Berthing
2023-02-16 9:50 ` Conor Dooley
2023-02-16 9:50 ` Conor Dooley
2023-02-16 10:09 ` Conor Dooley
2023-02-16 10:09 ` Conor Dooley
2023-02-16 10:32 ` Emil Renner Berthing
2023-02-16 10:32 ` Emil Renner Berthing
2023-02-16 12:27 ` Hal Feng
2023-02-16 12:27 ` Hal Feng
2023-02-16 13:02 ` Conor Dooley
2023-02-16 13:02 ` Conor Dooley
2022-12-26 23:01 ` [PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC Conor Dooley
2022-12-26 23:01 ` Conor Dooley
2022-12-27 7:58 ` Krzysztof Kozlowski
2022-12-27 7:58 ` Krzysztof Kozlowski
2022-12-27 14:20 ` Conor Dooley
2022-12-27 14:20 ` Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221220011247.35560-6-hal.feng@starfivetech.com \
--to=hal.feng@starfivetech.com \
--cc=aou@eecs.berkeley.edu \
--cc=ben.dooks@sifive.com \
--cc=conor@kernel.org \
--cc=daniel.lezcano@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=emil.renner.berthing@canonical.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linus.walleij@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=maz@kernel.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.