From: Conor Dooley <conor@kernel.org> To: Hal Feng <hal.feng@starfivetech.com> Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Ben Dooks <ben.dooks@sifive.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, Linus Walleij <linus.walleij@linaro.org>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 5/7] soc: sifive: ccache: Add StarFive JH7110 support Date: Tue, 20 Dec 2022 21:14:54 +0000 [thread overview] Message-ID: <Y6IlztUSTEiBw7Pd@spud> (raw) In-Reply-To: <20221220011247.35560-6-hal.feng@starfivetech.com> [-- Attachment #1: Type: text/plain, Size: 1536 bytes --] On Tue, Dec 20, 2022 at 09:12:45AM +0800, Hal Feng wrote: > From: Emil Renner Berthing <kernel@esmil.dk> > > This adds support for the StarFive JH7110 SoC which also > features this SiFive cache controller. > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> I'll queue this and the ccache binding for v6.3 once -rc1 is tagged, once again with the caveat that screaming from Emil with dissuade me. Ordinarily, I'd wait for his R-b, but he is the author.. Thanks, Conor. > --- > drivers/soc/Makefile | 2 +- > drivers/soc/sifive/Kconfig | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile > index 69ba6508cf2c..534669840858 100644 > --- a/drivers/soc/Makefile > +++ b/drivers/soc/Makefile > @@ -26,7 +26,7 @@ obj-y += qcom/ > obj-y += renesas/ > obj-y += rockchip/ > obj-$(CONFIG_SOC_SAMSUNG) += samsung/ > -obj-$(CONFIG_SOC_SIFIVE) += sifive/ > +obj-y += sifive/ > obj-y += sunxi/ > obj-$(CONFIG_ARCH_TEGRA) += tegra/ > obj-y += ti/ > diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig > index ed4c571f8771..e86870be34c9 100644 > --- a/drivers/soc/sifive/Kconfig > +++ b/drivers/soc/sifive/Kconfig > @@ -1,6 +1,6 @@ > # SPDX-License-Identifier: GPL-2.0 > > -if SOC_SIFIVE > +if SOC_SIFIVE || SOC_STARFIVE > > config SIFIVE_CCACHE > bool "Sifive Composable Cache controller" > -- > 2.38.1 > > [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org> To: Hal Feng <hal.feng@starfivetech.com> Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Ben Dooks <ben.dooks@sifive.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, Linus Walleij <linus.walleij@linaro.org>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 5/7] soc: sifive: ccache: Add StarFive JH7110 support Date: Tue, 20 Dec 2022 21:14:54 +0000 [thread overview] Message-ID: <Y6IlztUSTEiBw7Pd@spud> (raw) In-Reply-To: <20221220011247.35560-6-hal.feng@starfivetech.com> [-- Attachment #1.1: Type: text/plain, Size: 1536 bytes --] On Tue, Dec 20, 2022 at 09:12:45AM +0800, Hal Feng wrote: > From: Emil Renner Berthing <kernel@esmil.dk> > > This adds support for the StarFive JH7110 SoC which also > features this SiFive cache controller. > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> I'll queue this and the ccache binding for v6.3 once -rc1 is tagged, once again with the caveat that screaming from Emil with dissuade me. Ordinarily, I'd wait for his R-b, but he is the author.. Thanks, Conor. > --- > drivers/soc/Makefile | 2 +- > drivers/soc/sifive/Kconfig | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile > index 69ba6508cf2c..534669840858 100644 > --- a/drivers/soc/Makefile > +++ b/drivers/soc/Makefile > @@ -26,7 +26,7 @@ obj-y += qcom/ > obj-y += renesas/ > obj-y += rockchip/ > obj-$(CONFIG_SOC_SAMSUNG) += samsung/ > -obj-$(CONFIG_SOC_SIFIVE) += sifive/ > +obj-y += sifive/ > obj-y += sunxi/ > obj-$(CONFIG_ARCH_TEGRA) += tegra/ > obj-y += ti/ > diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig > index ed4c571f8771..e86870be34c9 100644 > --- a/drivers/soc/sifive/Kconfig > +++ b/drivers/soc/sifive/Kconfig > @@ -1,6 +1,6 @@ > # SPDX-License-Identifier: GPL-2.0 > > -if SOC_SIFIVE > +if SOC_SIFIVE || SOC_STARFIVE > > config SIFIVE_CCACHE > bool "Sifive Composable Cache controller" > -- > 2.38.1 > > [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-12-20 21:15 UTC|newest] Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-20 1:12 [PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng 2022-12-20 1:12 ` Hal Feng 2022-12-20 1:12 ` [PATCH v3 1/7] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board Hal Feng 2022-12-20 1:12 ` Hal Feng 2022-12-20 10:05 ` Krzysztof Kozlowski 2022-12-20 10:05 ` Krzysztof Kozlowski 2022-12-23 2:05 ` Hal Feng 2022-12-23 2:05 ` Hal Feng 2022-12-20 20:58 ` Conor Dooley 2022-12-20 20:58 ` Conor Dooley 2022-12-23 2:15 ` Hal Feng 2022-12-23 2:15 ` Hal Feng 2022-12-20 1:12 ` [PATCH v3 2/7] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng 2022-12-20 1:12 ` Hal Feng 2022-12-20 1:12 ` [PATCH v3 3/7] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng 2022-12-20 1:12 ` Hal Feng 2022-12-20 1:12 ` [PATCH v3 4/7] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Hal Feng 2022-12-20 1:12 ` Hal Feng 2022-12-20 20:21 ` Rob Herring 2022-12-20 20:21 ` Rob Herring 2022-12-20 1:12 ` [PATCH v3 5/7] soc: sifive: ccache: Add StarFive JH7110 support Hal Feng 2022-12-20 1:12 ` Hal Feng 2022-12-20 21:14 ` Conor Dooley [this message] 2022-12-20 21:14 ` Conor Dooley 2022-12-20 1:12 ` [PATCH v3 6/7] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng 2022-12-20 1:12 ` Hal Feng 2022-12-20 10:10 ` Krzysztof Kozlowski 2022-12-20 10:10 ` Krzysztof Kozlowski 2022-12-25 10:31 ` Hal Feng 2022-12-25 10:31 ` Hal Feng 2022-12-25 11:56 ` Krzysztof Kozlowski 2022-12-25 11:56 ` Krzysztof Kozlowski 2022-12-20 21:31 ` Conor Dooley 2022-12-20 21:31 ` Conor Dooley 2022-12-25 14:31 ` Hal Feng 2022-12-25 14:31 ` Hal Feng 2022-12-27 20:58 ` Conor Dooley 2022-12-27 20:58 ` Conor Dooley 2022-12-28 22:48 ` Conor Dooley 2022-12-28 22:48 ` Conor Dooley 2022-12-29 5:25 ` Icenowy Zheng 2022-12-29 5:25 ` Icenowy Zheng 2022-12-29 9:02 ` Conor Dooley 2022-12-29 9:02 ` Conor Dooley 2023-02-01 7:53 ` Hal Feng 2023-02-01 7:53 ` Hal Feng 2023-02-01 7:31 ` Hal Feng 2023-02-01 7:31 ` Hal Feng 2023-02-01 7:21 ` Hal Feng 2023-02-01 7:21 ` Hal Feng 2023-02-01 8:21 ` Conor Dooley 2023-02-01 8:21 ` Conor Dooley 2023-02-02 18:56 ` Hal Feng 2023-02-02 18:56 ` Hal Feng 2023-02-02 19:41 ` Conor Dooley 2023-02-02 19:41 ` Conor Dooley 2023-02-09 11:11 ` Conor Dooley 2023-02-09 11:11 ` Conor Dooley 2023-02-13 9:41 ` Hal Feng 2023-02-13 9:41 ` Hal Feng 2023-02-13 10:07 ` Conor Dooley 2023-02-13 10:07 ` Conor Dooley 2023-02-14 2:37 ` Hal Feng 2023-02-14 2:37 ` Hal Feng 2023-02-15 3:07 ` Hal Feng 2023-02-15 3:07 ` Hal Feng 2023-02-15 7:42 ` Conor Dooley 2023-02-15 7:42 ` Conor Dooley 2023-02-15 7:59 ` Conor Dooley 2023-02-15 7:59 ` Conor Dooley 2023-01-31 2:00 ` Hal Feng 2023-01-31 2:00 ` Hal Feng 2023-01-31 6:17 ` Conor Dooley 2023-01-31 6:17 ` Conor Dooley 2023-02-02 2:42 ` Hal Feng 2023-02-02 2:42 ` Hal Feng 2023-02-02 6:19 ` Conor Dooley 2023-02-02 6:19 ` Conor Dooley 2022-12-20 1:12 ` [PATCH v3 7/7] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board " Hal Feng 2022-12-20 1:12 ` Hal Feng 2022-12-20 21:26 ` Conor Dooley 2022-12-20 21:26 ` Conor Dooley 2022-12-23 3:12 ` Hal Feng 2022-12-23 3:12 ` Hal Feng 2022-12-28 22:49 ` Conor Dooley 2022-12-28 22:49 ` Conor Dooley 2023-01-10 17:59 ` Conor Dooley 2023-01-10 17:59 ` Conor Dooley 2023-01-18 23:43 ` Conor Dooley 2023-01-18 23:43 ` Conor Dooley 2023-02-14 9:53 ` Emil Renner Berthing 2023-02-14 9:53 ` Emil Renner Berthing 2023-02-15 14:03 ` Hal Feng 2023-02-15 14:03 ` Hal Feng 2023-02-16 9:27 ` Emil Renner Berthing 2023-02-16 9:27 ` Emil Renner Berthing 2023-02-16 9:50 ` Conor Dooley 2023-02-16 9:50 ` Conor Dooley 2023-02-16 10:09 ` Conor Dooley 2023-02-16 10:09 ` Conor Dooley 2023-02-16 10:32 ` Emil Renner Berthing 2023-02-16 10:32 ` Emil Renner Berthing 2023-02-16 12:27 ` Hal Feng 2023-02-16 12:27 ` Hal Feng 2023-02-16 13:02 ` Conor Dooley 2023-02-16 13:02 ` Conor Dooley 2022-12-26 23:01 ` [PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC Conor Dooley 2022-12-26 23:01 ` Conor Dooley 2022-12-27 7:58 ` Krzysztof Kozlowski 2022-12-27 7:58 ` Krzysztof Kozlowski 2022-12-27 14:20 ` Conor Dooley 2022-12-27 14:20 ` Conor Dooley
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