All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Samuel Holland <samuel.holland@sifive.com>,
	Anup Patel <anup@brainfault.org>
Cc: "Anup Patel" <apatel@ventanamicro.com>,
	devicetree@vger.kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Marc Zyngier" <maz@kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	linux-kernel@vger.kernel.org,
	"Saravana Kannan" <saravanak@google.com>,
	"Björn Töpel" <bjorn@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Frank Rowand" <frowand.list@gmail.com>,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	"Andrew Jones" <ajones@ventanamicro.com>
Subject: Re: [PATCH v14 01/18] irqchip/sifive-plic: Convert PLIC driver into a platform driver
Date: Wed, 3 Apr 2024 19:10:31 +0100	[thread overview]
Message-ID: <CA+V-a8uLjEb==sTXa3WePqTWn4ejVNJfMu+qTXSNZz1Uw+U5oA@mail.gmail.com> (raw)
In-Reply-To: <4dbd5daf-d100-4ae2-8bda-c657e23a809e@sifive.com>

Hi Samuel and Anup,

On Wed, Apr 3, 2024 at 5:28 PM Samuel Holland <samuel.holland@sifive.com> wrote:
>
> Hi Prabhakar,
>
> On 2024-04-03 10:49 AM, Lad, Prabhakar wrote:
> > On Wed, Apr 3, 2024 at 3:17 PM Anup Patel <apatel@ventanamicro.com> wrote:
> >>
> >> On Wed, Apr 3, 2024 at 2:01 PM Lad, Prabhakar
> >> <prabhakar.csengg@gmail.com> wrote:
> >>>
> >>> Hi Anup,
> >>>
> >>> On Thu, Feb 22, 2024 at 9:41 AM Anup Patel <apatel@ventanamicro.com> wrote:
> >>>>
> >>>> The PLIC driver does not require very early initialization so convert
> >>>> it into a platform driver.
> >>>>
> >>>> After conversion, the PLIC driver is probed after CPUs are brought-up
> >>>> so setup cpuhp state after context handler of all online CPUs are
> >>>> initialized otherwise PLIC driver crashes for platforms with multiple
> >>>> PLIC instances.
> >>>>
> >>>> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> >>>> ---
> >>>>  drivers/irqchip/irq-sifive-plic.c | 101 ++++++++++++++++++------------
> >>>>  1 file changed, 61 insertions(+), 40 deletions(-)
> >>>>
> >>> This patch seems to have broken things on RZ/Five SoC, after reverting
> >>> this patch I get to boot it back again on v6.9-rc2. Looks like there
> >>> is some probe order issue after switching to platform driver?
> >>
> >> Yes, this is most likely related to probe ordering based on your DT.
> >>
> >> Can you share the failing boot log and DT ?
> >
> > non working case, https://paste.debian.net/1312947/
>
> Looks like you need to add "keep_bootcon" to your kernel command line to get a
> full log here.
>
Thanks for the pointer, that helped me to get to the root cause.

> > after reverting, https://paste.debian.net/1312948/
> > (attached is the DTB)
>
> I don't see anything suspicious between the "riscv-intc" lines and the "Fixed
> dependency cycle(s)" lines that looks like it would depend on the PLIC IRQ
> domain. Maybe there is some driver that does not handle -EPROBE_DEFER? It's hard
> to tell without the full log from the failure case.
>
The clock required for the PLIC wasnt available during the probe of
this driver. This bug got hidden when the PLIC driver was probed
earlier  in boot where it used an incorrect clock source. Ive created
a patch which adds a missing clock for the PLIC.

Sorry for the noise!

Cheers,
Prabhakar

WARNING: multiple messages have this Message-ID (diff)
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Samuel Holland <samuel.holland@sifive.com>,
	Anup Patel <anup@brainfault.org>
Cc: "Anup Patel" <apatel@ventanamicro.com>,
	devicetree@vger.kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Marc Zyngier" <maz@kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	linux-kernel@vger.kernel.org,
	"Saravana Kannan" <saravanak@google.com>,
	"Björn Töpel" <bjorn@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Frank Rowand" <frowand.list@gmail.com>,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	"Andrew Jones" <ajones@ventanamicro.com>
Subject: Re: [PATCH v14 01/18] irqchip/sifive-plic: Convert PLIC driver into a platform driver
Date: Wed, 3 Apr 2024 19:10:31 +0100	[thread overview]
Message-ID: <CA+V-a8uLjEb==sTXa3WePqTWn4ejVNJfMu+qTXSNZz1Uw+U5oA@mail.gmail.com> (raw)
In-Reply-To: <4dbd5daf-d100-4ae2-8bda-c657e23a809e@sifive.com>

Hi Samuel and Anup,

On Wed, Apr 3, 2024 at 5:28 PM Samuel Holland <samuel.holland@sifive.com> wrote:
>
> Hi Prabhakar,
>
> On 2024-04-03 10:49 AM, Lad, Prabhakar wrote:
> > On Wed, Apr 3, 2024 at 3:17 PM Anup Patel <apatel@ventanamicro.com> wrote:
> >>
> >> On Wed, Apr 3, 2024 at 2:01 PM Lad, Prabhakar
> >> <prabhakar.csengg@gmail.com> wrote:
> >>>
> >>> Hi Anup,
> >>>
> >>> On Thu, Feb 22, 2024 at 9:41 AM Anup Patel <apatel@ventanamicro.com> wrote:
> >>>>
> >>>> The PLIC driver does not require very early initialization so convert
> >>>> it into a platform driver.
> >>>>
> >>>> After conversion, the PLIC driver is probed after CPUs are brought-up
> >>>> so setup cpuhp state after context handler of all online CPUs are
> >>>> initialized otherwise PLIC driver crashes for platforms with multiple
> >>>> PLIC instances.
> >>>>
> >>>> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> >>>> ---
> >>>>  drivers/irqchip/irq-sifive-plic.c | 101 ++++++++++++++++++------------
> >>>>  1 file changed, 61 insertions(+), 40 deletions(-)
> >>>>
> >>> This patch seems to have broken things on RZ/Five SoC, after reverting
> >>> this patch I get to boot it back again on v6.9-rc2. Looks like there
> >>> is some probe order issue after switching to platform driver?
> >>
> >> Yes, this is most likely related to probe ordering based on your DT.
> >>
> >> Can you share the failing boot log and DT ?
> >
> > non working case, https://paste.debian.net/1312947/
>
> Looks like you need to add "keep_bootcon" to your kernel command line to get a
> full log here.
>
Thanks for the pointer, that helped me to get to the root cause.

> > after reverting, https://paste.debian.net/1312948/
> > (attached is the DTB)
>
> I don't see anything suspicious between the "riscv-intc" lines and the "Fixed
> dependency cycle(s)" lines that looks like it would depend on the PLIC IRQ
> domain. Maybe there is some driver that does not handle -EPROBE_DEFER? It's hard
> to tell without the full log from the failure case.
>
The clock required for the PLIC wasnt available during the probe of
this driver. This bug got hidden when the PLIC driver was probed
earlier  in boot where it used an incorrect clock source. Ive created
a patch which adds a missing clock for the PLIC.

Sorry for the noise!

Cheers,
Prabhakar

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Samuel Holland <samuel.holland@sifive.com>,
	Anup Patel <anup@brainfault.org>
Cc: "Anup Patel" <apatel@ventanamicro.com>,
	devicetree@vger.kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Marc Zyngier" <maz@kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	linux-kernel@vger.kernel.org,
	"Saravana Kannan" <saravanak@google.com>,
	"Björn Töpel" <bjorn@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Frank Rowand" <frowand.list@gmail.com>,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	"Andrew Jones" <ajones@ventanamicro.com>
Subject: Re: [PATCH v14 01/18] irqchip/sifive-plic: Convert PLIC driver into a platform driver
Date: Wed, 3 Apr 2024 19:10:31 +0100	[thread overview]
Message-ID: <CA+V-a8uLjEb==sTXa3WePqTWn4ejVNJfMu+qTXSNZz1Uw+U5oA@mail.gmail.com> (raw)
In-Reply-To: <4dbd5daf-d100-4ae2-8bda-c657e23a809e@sifive.com>

Hi Samuel and Anup,

On Wed, Apr 3, 2024 at 5:28 PM Samuel Holland <samuel.holland@sifive.com> wrote:
>
> Hi Prabhakar,
>
> On 2024-04-03 10:49 AM, Lad, Prabhakar wrote:
> > On Wed, Apr 3, 2024 at 3:17 PM Anup Patel <apatel@ventanamicro.com> wrote:
> >>
> >> On Wed, Apr 3, 2024 at 2:01 PM Lad, Prabhakar
> >> <prabhakar.csengg@gmail.com> wrote:
> >>>
> >>> Hi Anup,
> >>>
> >>> On Thu, Feb 22, 2024 at 9:41 AM Anup Patel <apatel@ventanamicro.com> wrote:
> >>>>
> >>>> The PLIC driver does not require very early initialization so convert
> >>>> it into a platform driver.
> >>>>
> >>>> After conversion, the PLIC driver is probed after CPUs are brought-up
> >>>> so setup cpuhp state after context handler of all online CPUs are
> >>>> initialized otherwise PLIC driver crashes for platforms with multiple
> >>>> PLIC instances.
> >>>>
> >>>> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> >>>> ---
> >>>>  drivers/irqchip/irq-sifive-plic.c | 101 ++++++++++++++++++------------
> >>>>  1 file changed, 61 insertions(+), 40 deletions(-)
> >>>>
> >>> This patch seems to have broken things on RZ/Five SoC, after reverting
> >>> this patch I get to boot it back again on v6.9-rc2. Looks like there
> >>> is some probe order issue after switching to platform driver?
> >>
> >> Yes, this is most likely related to probe ordering based on your DT.
> >>
> >> Can you share the failing boot log and DT ?
> >
> > non working case, https://paste.debian.net/1312947/
>
> Looks like you need to add "keep_bootcon" to your kernel command line to get a
> full log here.
>
Thanks for the pointer, that helped me to get to the root cause.

> > after reverting, https://paste.debian.net/1312948/
> > (attached is the DTB)
>
> I don't see anything suspicious between the "riscv-intc" lines and the "Fixed
> dependency cycle(s)" lines that looks like it would depend on the PLIC IRQ
> domain. Maybe there is some driver that does not handle -EPROBE_DEFER? It's hard
> to tell without the full log from the failure case.
>
The clock required for the PLIC wasnt available during the probe of
this driver. This bug got hidden when the PLIC driver was probed
earlier  in boot where it used an incorrect clock source. Ive created
a patch which adds a missing clock for the PLIC.

Sorry for the noise!

Cheers,
Prabhakar

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2024-04-03 18:12 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-22  9:39 [PATCH v14 00/18] Linux RISC-V AIA Support Anup Patel
2024-02-22  9:39 ` Anup Patel
2024-02-22  9:39 ` Anup Patel
2024-02-22  9:39 ` [PATCH v14 01/18] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-04-03  8:29   ` [PATCH v14 01/18] " Lad, Prabhakar
2024-04-03  8:29     ` Lad, Prabhakar
2024-04-03  8:29     ` Lad, Prabhakar
2024-04-03 14:16     ` Anup Patel
2024-04-03 14:16       ` Anup Patel
2024-04-03 14:16       ` Anup Patel
2024-04-03 15:49       ` Lad, Prabhakar
2024-04-03 15:49         ` Lad, Prabhakar
2024-04-03 15:49         ` Lad, Prabhakar
2024-04-03 16:28         ` Samuel Holland
2024-04-03 16:28           ` Samuel Holland
2024-04-03 16:28           ` Samuel Holland
2024-04-03 18:10           ` Lad, Prabhakar [this message]
2024-04-03 18:10             ` Lad, Prabhakar
2024-04-03 18:10             ` Lad, Prabhakar
2024-04-03 16:42         ` Anup Patel
2024-04-03 16:42           ` Anup Patel
2024-04-03 16:42           ` Anup Patel
2024-04-03 17:19         ` Anup Patel
2024-04-03 17:19           ` Anup Patel
2024-04-03 17:19           ` Anup Patel
2024-02-22  9:39 ` [PATCH v14 02/18] irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz() Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 03/18] irqchip/sifive-plic: Use devm_xyz() for managed allocation Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 04/18] irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent fwnode Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 05/18] irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain creation failure Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 06/18] irqchip/sifive-plic: Parse number of irqs and contexts early in plic_probe Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe() tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 07/18] irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 08/18] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 09/18] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39 ` [PATCH v14 10/18] genirq/matrix: Dynamic bitmap allocation Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Björn Töpel
2024-02-22  9:39 ` [PATCH v14 11/18] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22 13:13   ` Björn Töpel
2024-02-22 13:13     ` Björn Töpel
2024-02-22 13:13     ` Björn Töpel
2024-02-22 13:42     ` Anup Patel
2024-02-22 13:42       ` Anup Patel
2024-02-22 13:42       ` Anup Patel
2024-02-22 14:15       ` Björn Töpel
2024-02-22 14:15         ` Björn Töpel
2024-02-22 14:15         ` Björn Töpel
2024-02-23  8:28   ` Thomas Gleixner
2024-02-23  8:28     ` Thomas Gleixner
2024-02-23  8:28     ` Thomas Gleixner
2024-02-23  9:52     ` Anup Patel
2024-02-23  9:52       ` Anup Patel
2024-02-23  9:52       ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 12/18] irqchip/riscv-imsic: Add device MSI domain support for platform devices Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22 13:15   ` Björn Töpel
2024-02-22 13:15     ` Björn Töpel
2024-02-22 13:15     ` Björn Töpel
2024-02-22 13:44     ` Anup Patel
2024-02-22 13:44       ` Anup Patel
2024-02-22 13:44       ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 13/18] irqchip/riscv-imsic: Add device MSI domain support for PCI devices Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22 13:14   ` Björn Töpel
2024-02-22 13:14     ` Björn Töpel
2024-02-22 13:14     ` Björn Töpel
2024-02-22 13:30     ` Anup Patel
2024-02-22 13:30       ` Anup Patel
2024-02-22 13:30       ` Anup Patel
2024-02-22 14:05       ` Björn Töpel
2024-02-22 14:05         ` Björn Töpel
2024-02-22 14:05         ` Björn Töpel
2024-02-22  9:40 ` [PATCH v14 14/18] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 15/18] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 16/18] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 17/18] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 18/18] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CA+V-a8uLjEb==sTXa3WePqTWn4ejVNJfMu+qTXSNZz1Uw+U5oA@mail.gmail.com' \
    --to=prabhakar.csengg@gmail.com \
    --cc=ajones@ventanamicro.com \
    --cc=anup@brainfault.org \
    --cc=apatel@ventanamicro.com \
    --cc=atishp@atishpatra.org \
    --cc=bjorn@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=frowand.list@gmail.com \
    --cc=geert+renesas@glider.be \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=maz@kernel.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=samuel.holland@sifive.com \
    --cc=saravanak@google.com \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.