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From: Anup Patel <anup@brainfault.org>
To: "Björn Töpel" <bjorn@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	 Rob Herring <robh+dt@kernel.org>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	 Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org,
	 Saravana Kannan <saravanak@google.com>,
	Marc Zyngier <maz@kernel.org>,
	linux-kernel@vger.kernel.org,
	 Atish Patra <atishp@atishpatra.org>,
	linux-riscv@lists.infradead.org,
	 linux-arm-kernel@lists.infradead.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v14 12/18] irqchip/riscv-imsic: Add device MSI domain support for platform devices
Date: Thu, 22 Feb 2024 19:14:43 +0530	[thread overview]
Message-ID: <CAAhSdy1V5yqO3kqs7+wOb34oSDgdo=QRT-i2XG+okFtHTgyMrQ@mail.gmail.com> (raw)
In-Reply-To: <87jzmwtzbs.fsf@all.your.base.are.belong.to.us>

On Thu, Feb 22, 2024 at 6:45 PM Björn Töpel <bjorn@kernel.org> wrote:
>
> Anup Patel <apatel@ventanamicro.com> writes:
>
> > The Linux platform MSI support allows per-device MSI domains so add
> > a platform irqchip driver for RISC-V IMSIC which provides a base IRQ
> > domain with MSI parent support for platform device domains.
> >
> > The IMSIC platform driver assumes that the IMSIC state is already
> > initialized by the IMSIC early driver.
> >
> > Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> > ---
> >  drivers/irqchip/Makefile                   |   2 +-
> >  drivers/irqchip/irq-riscv-imsic-platform.c | 344 +++++++++++++++++++++
> >  drivers/irqchip/irq-riscv-imsic-state.h    |   1 +
> >  3 files changed, 346 insertions(+), 1 deletion(-)
> >  create mode 100644 drivers/irqchip/irq-riscv-imsic-platform.c
> >
> > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> > index d714724387ce..abca445a3229 100644
> > --- a/drivers/irqchip/Makefile
> > +++ b/drivers/irqchip/Makefile
> > @@ -95,7 +95,7 @@ obj-$(CONFIG_QCOM_MPM)                      += irq-qcom-mpm.o
> >  obj-$(CONFIG_CSKY_MPINTC)            += irq-csky-mpintc.o
> >  obj-$(CONFIG_CSKY_APB_INTC)          += irq-csky-apb-intc.o
> >  obj-$(CONFIG_RISCV_INTC)             += irq-riscv-intc.o
> > -obj-$(CONFIG_RISCV_IMSIC)            += irq-riscv-imsic-state.o irq-riscv-imsic-early.o
> > +obj-$(CONFIG_RISCV_IMSIC)            += irq-riscv-imsic-state.o irq-riscv-imsic-early.o irq-riscv-imsic-platform.o
> >  obj-$(CONFIG_SIFIVE_PLIC)            += irq-sifive-plic.o
> >  obj-$(CONFIG_IMX_IRQSTEER)           += irq-imx-irqsteer.o
> >  obj-$(CONFIG_IMX_INTMUX)             += irq-imx-intmux.o
> > diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c
> > new file mode 100644
> > index 000000000000..e2344fc08dca
> > --- /dev/null
> > +++ b/drivers/irqchip/irq-riscv-imsic-platform.c
> > @@ -0,0 +1,344 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2021 Western Digital Corporation or its affiliates.
> > + * Copyright (C) 2022 Ventana Micro Systems Inc.
> > + */
> > +
> > +#define pr_fmt(fmt) "riscv-imsic: " fmt
> > +#include <linux/bitmap.h>
> > +#include <linux/cpu.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/io.h>
> > +#include <linux/irq.h>
> > +#include <linux/irqchip.h>
> > +#include <linux/irqdomain.h>
> > +#include <linux/module.h>
> > +#include <linux/msi.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/spinlock.h>
> > +#include <linux/smp.h>
> > +
> > +#include "irq-riscv-imsic-state.h"
> > +
> > +static bool imsic_cpu_page_phys(unsigned int cpu, unsigned int guest_index,
> > +                             phys_addr_t *out_msi_pa)
> > +{
> > +     struct imsic_global_config *global;
> > +     struct imsic_local_config *local;
> > +
> > +     global = &imsic->global;
> > +     local = per_cpu_ptr(global->local, cpu);
> > +
> > +     if (BIT(global->guest_index_bits) <= guest_index)
> > +             return false;
> > +
> > +     if (out_msi_pa)
> > +             *out_msi_pa = local->msi_pa +
> > +                           (guest_index * IMSIC_MMIO_PAGE_SZ);
>
> Nit: And one more redundant parenthesis and 100 char! ;-)

Ahh, I missed updating this line. I will update in the next revision.

Regards,
Anup

WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup@brainfault.org>
To: "Björn Töpel" <bjorn@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	 Rob Herring <robh+dt@kernel.org>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	 Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org,
	 Saravana Kannan <saravanak@google.com>,
	Marc Zyngier <maz@kernel.org>,
	linux-kernel@vger.kernel.org,
	 Atish Patra <atishp@atishpatra.org>,
	linux-riscv@lists.infradead.org,
	 linux-arm-kernel@lists.infradead.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v14 12/18] irqchip/riscv-imsic: Add device MSI domain support for platform devices
Date: Thu, 22 Feb 2024 19:14:43 +0530	[thread overview]
Message-ID: <CAAhSdy1V5yqO3kqs7+wOb34oSDgdo=QRT-i2XG+okFtHTgyMrQ@mail.gmail.com> (raw)
In-Reply-To: <87jzmwtzbs.fsf@all.your.base.are.belong.to.us>

On Thu, Feb 22, 2024 at 6:45 PM Björn Töpel <bjorn@kernel.org> wrote:
>
> Anup Patel <apatel@ventanamicro.com> writes:
>
> > The Linux platform MSI support allows per-device MSI domains so add
> > a platform irqchip driver for RISC-V IMSIC which provides a base IRQ
> > domain with MSI parent support for platform device domains.
> >
> > The IMSIC platform driver assumes that the IMSIC state is already
> > initialized by the IMSIC early driver.
> >
> > Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> > ---
> >  drivers/irqchip/Makefile                   |   2 +-
> >  drivers/irqchip/irq-riscv-imsic-platform.c | 344 +++++++++++++++++++++
> >  drivers/irqchip/irq-riscv-imsic-state.h    |   1 +
> >  3 files changed, 346 insertions(+), 1 deletion(-)
> >  create mode 100644 drivers/irqchip/irq-riscv-imsic-platform.c
> >
> > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> > index d714724387ce..abca445a3229 100644
> > --- a/drivers/irqchip/Makefile
> > +++ b/drivers/irqchip/Makefile
> > @@ -95,7 +95,7 @@ obj-$(CONFIG_QCOM_MPM)                      += irq-qcom-mpm.o
> >  obj-$(CONFIG_CSKY_MPINTC)            += irq-csky-mpintc.o
> >  obj-$(CONFIG_CSKY_APB_INTC)          += irq-csky-apb-intc.o
> >  obj-$(CONFIG_RISCV_INTC)             += irq-riscv-intc.o
> > -obj-$(CONFIG_RISCV_IMSIC)            += irq-riscv-imsic-state.o irq-riscv-imsic-early.o
> > +obj-$(CONFIG_RISCV_IMSIC)            += irq-riscv-imsic-state.o irq-riscv-imsic-early.o irq-riscv-imsic-platform.o
> >  obj-$(CONFIG_SIFIVE_PLIC)            += irq-sifive-plic.o
> >  obj-$(CONFIG_IMX_IRQSTEER)           += irq-imx-irqsteer.o
> >  obj-$(CONFIG_IMX_INTMUX)             += irq-imx-intmux.o
> > diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c
> > new file mode 100644
> > index 000000000000..e2344fc08dca
> > --- /dev/null
> > +++ b/drivers/irqchip/irq-riscv-imsic-platform.c
> > @@ -0,0 +1,344 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2021 Western Digital Corporation or its affiliates.
> > + * Copyright (C) 2022 Ventana Micro Systems Inc.
> > + */
> > +
> > +#define pr_fmt(fmt) "riscv-imsic: " fmt
> > +#include <linux/bitmap.h>
> > +#include <linux/cpu.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/io.h>
> > +#include <linux/irq.h>
> > +#include <linux/irqchip.h>
> > +#include <linux/irqdomain.h>
> > +#include <linux/module.h>
> > +#include <linux/msi.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/spinlock.h>
> > +#include <linux/smp.h>
> > +
> > +#include "irq-riscv-imsic-state.h"
> > +
> > +static bool imsic_cpu_page_phys(unsigned int cpu, unsigned int guest_index,
> > +                             phys_addr_t *out_msi_pa)
> > +{
> > +     struct imsic_global_config *global;
> > +     struct imsic_local_config *local;
> > +
> > +     global = &imsic->global;
> > +     local = per_cpu_ptr(global->local, cpu);
> > +
> > +     if (BIT(global->guest_index_bits) <= guest_index)
> > +             return false;
> > +
> > +     if (out_msi_pa)
> > +             *out_msi_pa = local->msi_pa +
> > +                           (guest_index * IMSIC_MMIO_PAGE_SZ);
>
> Nit: And one more redundant parenthesis and 100 char! ;-)

Ahh, I missed updating this line. I will update in the next revision.

Regards,
Anup

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup@brainfault.org>
To: "Björn Töpel" <bjorn@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	 Rob Herring <robh+dt@kernel.org>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	 Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org,
	 Saravana Kannan <saravanak@google.com>,
	Marc Zyngier <maz@kernel.org>,
	linux-kernel@vger.kernel.org,
	 Atish Patra <atishp@atishpatra.org>,
	linux-riscv@lists.infradead.org,
	 linux-arm-kernel@lists.infradead.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v14 12/18] irqchip/riscv-imsic: Add device MSI domain support for platform devices
Date: Thu, 22 Feb 2024 19:14:43 +0530	[thread overview]
Message-ID: <CAAhSdy1V5yqO3kqs7+wOb34oSDgdo=QRT-i2XG+okFtHTgyMrQ@mail.gmail.com> (raw)
In-Reply-To: <87jzmwtzbs.fsf@all.your.base.are.belong.to.us>

On Thu, Feb 22, 2024 at 6:45 PM Björn Töpel <bjorn@kernel.org> wrote:
>
> Anup Patel <apatel@ventanamicro.com> writes:
>
> > The Linux platform MSI support allows per-device MSI domains so add
> > a platform irqchip driver for RISC-V IMSIC which provides a base IRQ
> > domain with MSI parent support for platform device domains.
> >
> > The IMSIC platform driver assumes that the IMSIC state is already
> > initialized by the IMSIC early driver.
> >
> > Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> > ---
> >  drivers/irqchip/Makefile                   |   2 +-
> >  drivers/irqchip/irq-riscv-imsic-platform.c | 344 +++++++++++++++++++++
> >  drivers/irqchip/irq-riscv-imsic-state.h    |   1 +
> >  3 files changed, 346 insertions(+), 1 deletion(-)
> >  create mode 100644 drivers/irqchip/irq-riscv-imsic-platform.c
> >
> > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> > index d714724387ce..abca445a3229 100644
> > --- a/drivers/irqchip/Makefile
> > +++ b/drivers/irqchip/Makefile
> > @@ -95,7 +95,7 @@ obj-$(CONFIG_QCOM_MPM)                      += irq-qcom-mpm.o
> >  obj-$(CONFIG_CSKY_MPINTC)            += irq-csky-mpintc.o
> >  obj-$(CONFIG_CSKY_APB_INTC)          += irq-csky-apb-intc.o
> >  obj-$(CONFIG_RISCV_INTC)             += irq-riscv-intc.o
> > -obj-$(CONFIG_RISCV_IMSIC)            += irq-riscv-imsic-state.o irq-riscv-imsic-early.o
> > +obj-$(CONFIG_RISCV_IMSIC)            += irq-riscv-imsic-state.o irq-riscv-imsic-early.o irq-riscv-imsic-platform.o
> >  obj-$(CONFIG_SIFIVE_PLIC)            += irq-sifive-plic.o
> >  obj-$(CONFIG_IMX_IRQSTEER)           += irq-imx-irqsteer.o
> >  obj-$(CONFIG_IMX_INTMUX)             += irq-imx-intmux.o
> > diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c
> > new file mode 100644
> > index 000000000000..e2344fc08dca
> > --- /dev/null
> > +++ b/drivers/irqchip/irq-riscv-imsic-platform.c
> > @@ -0,0 +1,344 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2021 Western Digital Corporation or its affiliates.
> > + * Copyright (C) 2022 Ventana Micro Systems Inc.
> > + */
> > +
> > +#define pr_fmt(fmt) "riscv-imsic: " fmt
> > +#include <linux/bitmap.h>
> > +#include <linux/cpu.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/io.h>
> > +#include <linux/irq.h>
> > +#include <linux/irqchip.h>
> > +#include <linux/irqdomain.h>
> > +#include <linux/module.h>
> > +#include <linux/msi.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/spinlock.h>
> > +#include <linux/smp.h>
> > +
> > +#include "irq-riscv-imsic-state.h"
> > +
> > +static bool imsic_cpu_page_phys(unsigned int cpu, unsigned int guest_index,
> > +                             phys_addr_t *out_msi_pa)
> > +{
> > +     struct imsic_global_config *global;
> > +     struct imsic_local_config *local;
> > +
> > +     global = &imsic->global;
> > +     local = per_cpu_ptr(global->local, cpu);
> > +
> > +     if (BIT(global->guest_index_bits) <= guest_index)
> > +             return false;
> > +
> > +     if (out_msi_pa)
> > +             *out_msi_pa = local->msi_pa +
> > +                           (guest_index * IMSIC_MMIO_PAGE_SZ);
>
> Nit: And one more redundant parenthesis and 100 char! ;-)

Ahh, I missed updating this line. I will update in the next revision.

Regards,
Anup

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2024-02-22 13:44 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-22  9:39 [PATCH v14 00/18] Linux RISC-V AIA Support Anup Patel
2024-02-22  9:39 ` Anup Patel
2024-02-22  9:39 ` Anup Patel
2024-02-22  9:39 ` [PATCH v14 01/18] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-04-03  8:29   ` [PATCH v14 01/18] " Lad, Prabhakar
2024-04-03  8:29     ` Lad, Prabhakar
2024-04-03  8:29     ` Lad, Prabhakar
2024-04-03 14:16     ` Anup Patel
2024-04-03 14:16       ` Anup Patel
2024-04-03 14:16       ` Anup Patel
2024-04-03 15:49       ` Lad, Prabhakar
2024-04-03 15:49         ` Lad, Prabhakar
2024-04-03 15:49         ` Lad, Prabhakar
2024-04-03 16:28         ` Samuel Holland
2024-04-03 16:28           ` Samuel Holland
2024-04-03 16:28           ` Samuel Holland
2024-04-03 18:10           ` Lad, Prabhakar
2024-04-03 18:10             ` Lad, Prabhakar
2024-04-03 18:10             ` Lad, Prabhakar
2024-04-03 16:42         ` Anup Patel
2024-04-03 16:42           ` Anup Patel
2024-04-03 16:42           ` Anup Patel
2024-04-03 17:19         ` Anup Patel
2024-04-03 17:19           ` Anup Patel
2024-04-03 17:19           ` Anup Patel
2024-02-22  9:39 ` [PATCH v14 02/18] irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz() Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 03/18] irqchip/sifive-plic: Use devm_xyz() for managed allocation Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 04/18] irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent fwnode Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 05/18] irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain creation failure Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 06/18] irqchip/sifive-plic: Parse number of irqs and contexts early in plic_probe Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe() tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 07/18] irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 08/18] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Anup Patel
2024-02-22  9:39 ` [PATCH v14 09/18] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39 ` [PATCH v14 10/18] genirq/matrix: Dynamic bitmap allocation Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-23  9:43   ` [tip: irq/msi] " tip-bot2 for Björn Töpel
2024-02-22  9:39 ` [PATCH v14 11/18] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22  9:39   ` Anup Patel
2024-02-22 13:13   ` Björn Töpel
2024-02-22 13:13     ` Björn Töpel
2024-02-22 13:13     ` Björn Töpel
2024-02-22 13:42     ` Anup Patel
2024-02-22 13:42       ` Anup Patel
2024-02-22 13:42       ` Anup Patel
2024-02-22 14:15       ` Björn Töpel
2024-02-22 14:15         ` Björn Töpel
2024-02-22 14:15         ` Björn Töpel
2024-02-23  8:28   ` Thomas Gleixner
2024-02-23  8:28     ` Thomas Gleixner
2024-02-23  8:28     ` Thomas Gleixner
2024-02-23  9:52     ` Anup Patel
2024-02-23  9:52       ` Anup Patel
2024-02-23  9:52       ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 12/18] irqchip/riscv-imsic: Add device MSI domain support for platform devices Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22 13:15   ` Björn Töpel
2024-02-22 13:15     ` Björn Töpel
2024-02-22 13:15     ` Björn Töpel
2024-02-22 13:44     ` Anup Patel [this message]
2024-02-22 13:44       ` Anup Patel
2024-02-22 13:44       ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 13/18] irqchip/riscv-imsic: Add device MSI domain support for PCI devices Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22 13:14   ` Björn Töpel
2024-02-22 13:14     ` Björn Töpel
2024-02-22 13:14     ` Björn Töpel
2024-02-22 13:30     ` Anup Patel
2024-02-22 13:30       ` Anup Patel
2024-02-22 13:30       ` Anup Patel
2024-02-22 14:05       ` Björn Töpel
2024-02-22 14:05         ` Björn Töpel
2024-02-22 14:05         ` Björn Töpel
2024-02-22  9:40 ` [PATCH v14 14/18] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 15/18] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 16/18] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 17/18] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 18/18] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2024-02-22  9:40   ` Anup Patel
2024-02-22  9:40   ` Anup Patel

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