Re: [PATCH v5 6/7] MAINTAINERS: Add entry for Renesas RISC-V

From: Guo Ren <guoren@kernel.org>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Conor Dooley <conor.dooley@microchip.com>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@rivosinc.com>,
	Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v5 6/7] MAINTAINERS: Add entry for Renesas RISC-V
Date: Sat, 29 Oct 2022 12:27:58 +0800	[thread overview]
Message-ID: <CAJF2gTS999PrC+uNntH4NF=ppLY0hbNCs=607=z3+LKWBWV3KQ@mail.gmail.com> (raw)
In-Reply-To: <20221028165921.94487-7-prabhakar.mahadev-lad.rj@bp.renesas.com>

On Sat, Oct 29, 2022 at 12:59 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add RISC-V architecture as part of ARM/Renesas architecture, as they have
> the same maintainers, use the same development collaboration
> infrastructure, and share many files.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> v4 -> v5
> * Rebased on -next
> * Included RB tag from Conor
>
> v3 -> v4
> * Included RB tag from Geert
>
> v2 -> v3
> * Merged as part of ARM
>
> v1 -> v2
> * New patch
> ---
>  MAINTAINERS | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6cdc2a74c7a2..0204f106d8c2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2691,7 +2691,7 @@ F:        arch/arm/boot/dts/rtd*
>  F:     arch/arm/mach-realtek/
>  F:     arch/arm64/boot/dts/realtek/
>
> -ARM/RENESAS ARCHITECTURE
> +ARM/RISC-V/RENESAS ARCHITECTURE
Great! Good luck RISC-V RENESAS ARCHITECTURE.

Reviewed-by: Guo Ren <guoren@kernel.org>

>  M:     Geert Uytterhoeven <geert+renesas@glider.be>
>  M:     Magnus Damm <magnus.damm@gmail.com>
>  L:     linux-renesas-soc@vger.kernel.org
> @@ -2713,6 +2713,7 @@ F:        arch/arm/include/debug/renesas-scif.S
>  F:     arch/arm/mach-shmobile/
>  F:     arch/arm64/boot/dts/renesas/
>  F:     arch/arm64/configs/renesas_defconfig
> +F:     arch/riscv/boot/dts/renesas/
>  F:     drivers/soc/renesas/
>  F:     include/linux/soc/renesas/
>
> --
> 2.25.1
>


-- 
Best Regards
 Guo Ren