From: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com, l.stach@pengutronix.de, tharvey@gateworks.com,
kishon@ti.com, vkoul@kernel.org, robh@kernel.org,
galak@kernel.crashing.org, shawnguo@kernel.org
Subject: Re: [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support
Date: Wed, 13 Oct 2021 14:45:50 +0200 [thread overview]
Message-ID: <00afb7b8bc6f7ad41cd6770532294992a667f1af.camel@ew.tq-group.com> (raw)
In-Reply-To: <1634028078-2387-10-git-send-email-hongxing.zhu@nxp.com>
On Tue, 2021-10-12 at 16:41 +0800, Richard Zhu wrote:
> i.MX8MM PCIe works mostly like the i.MX8MQ one, but has a different PHY
> and allows to output the internal PHY reference clock via the refclk pad.
> Add the i.MX8MM PCIe support based on the standalone PHY driver.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> [...]
> @@ -1130,6 +1176,14 @@ static int imx6_pcie_probe(struct platform_device *pdev)
> &imx6_pcie->tx_swing_low))
> imx6_pcie->tx_swing_low = 127;
>
> + /* get PHY refclk pad mode if there is PHY node */
> + phy_node = of_parse_phandle(node, "phys", 0);
> + if (phy_node) {
> + of_property_read_u32(phy_node, "fsl,refclk-pad-mode",
> + &imx6_pcie->refclk_pad_mode);
It seems to me that the refclk_pad_mode is not actually used by this
driver anymore, because it is handled by the PHY driver now. Is there a
reason to read this property here at all?
WARNING: multiple messages have this Message-ID (diff)
From: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com, l.stach@pengutronix.de,
tharvey@gateworks.com, kishon@ti.com, vkoul@kernel.org,
robh@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org
Subject: Re: [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support
Date: Wed, 13 Oct 2021 14:45:50 +0200 [thread overview]
Message-ID: <00afb7b8bc6f7ad41cd6770532294992a667f1af.camel@ew.tq-group.com> (raw)
In-Reply-To: <1634028078-2387-10-git-send-email-hongxing.zhu@nxp.com>
On Tue, 2021-10-12 at 16:41 +0800, Richard Zhu wrote:
> i.MX8MM PCIe works mostly like the i.MX8MQ one, but has a different PHY
> and allows to output the internal PHY reference clock via the refclk pad.
> Add the i.MX8MM PCIe support based on the standalone PHY driver.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> [...]
> @@ -1130,6 +1176,14 @@ static int imx6_pcie_probe(struct platform_device *pdev)
> &imx6_pcie->tx_swing_low))
> imx6_pcie->tx_swing_low = 127;
>
> + /* get PHY refclk pad mode if there is PHY node */
> + phy_node = of_parse_phandle(node, "phys", 0);
> + if (phy_node) {
> + of_property_read_u32(phy_node, "fsl,refclk-pad-mode",
> + &imx6_pcie->refclk_pad_mode);
It seems to me that the refclk_pad_mode is not actually used by this
driver anymore, because it is handled by the PHY driver now. Is there a
reason to read this property here at all?
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com, l.stach@pengutronix.de,
tharvey@gateworks.com, kishon@ti.com, vkoul@kernel.org,
robh@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org
Subject: Re: [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support
Date: Wed, 13 Oct 2021 14:45:50 +0200 [thread overview]
Message-ID: <00afb7b8bc6f7ad41cd6770532294992a667f1af.camel@ew.tq-group.com> (raw)
In-Reply-To: <1634028078-2387-10-git-send-email-hongxing.zhu@nxp.com>
On Tue, 2021-10-12 at 16:41 +0800, Richard Zhu wrote:
> i.MX8MM PCIe works mostly like the i.MX8MQ one, but has a different PHY
> and allows to output the internal PHY reference clock via the refclk pad.
> Add the i.MX8MM PCIe support based on the standalone PHY driver.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> [...]
> @@ -1130,6 +1176,14 @@ static int imx6_pcie_probe(struct platform_device *pdev)
> &imx6_pcie->tx_swing_low))
> imx6_pcie->tx_swing_low = 127;
>
> + /* get PHY refclk pad mode if there is PHY node */
> + phy_node = of_parse_phandle(node, "phys", 0);
> + if (phy_node) {
> + of_property_read_u32(phy_node, "fsl,refclk-pad-mode",
> + &imx6_pcie->refclk_pad_mode);
It seems to me that the refclk_pad_mode is not actually used by this
driver anymore, because it is handled by the PHY driver now. Is there a
reason to read this property here at all?
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-10-13 12:45 UTC|newest]
Thread overview: 144+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-12 8:41 [PATCH v3 0/9] add the imx8m pcie phy driver and imx8mm pcie support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 1/9] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 2/9] dt-bindings: phy: add imx8 pcie phy driver support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 13:18 ` Rob Herring
2021-10-12 13:18 ` Rob Herring
2021-10-12 13:18 ` Rob Herring
2021-10-12 23:46 ` Richard Zhu
2021-10-12 23:46 ` Richard Zhu
2021-10-12 23:46 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 3/9] arm64: dts: imx8mm: add the pcie phy support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-15 18:30 ` Lucas Stach
2021-10-15 18:30 ` Lucas Stach
2021-10-15 18:30 ` Lucas Stach
2021-10-22 1:57 ` Richard Zhu
2021-10-22 1:57 ` Richard Zhu
2021-10-22 1:57 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 4/9] arm64: dts: imx8mm-evk: " Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-15 18:32 ` Lucas Stach
2021-10-15 18:32 ` Lucas Stach
2021-10-15 18:32 ` Lucas Stach
2021-10-22 1:58 ` Richard Zhu
2021-10-22 1:58 ` Richard Zhu
2021-10-22 1:58 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 5/9] phy: freescale: pcie: initialize the imx8 pcie standalone phy driver Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-15 18:55 ` Lucas Stach
2021-10-15 18:55 ` Lucas Stach
2021-10-15 18:55 ` Lucas Stach
2021-10-22 4:30 ` Richard Zhu
2021-10-22 4:30 ` Richard Zhu
2021-10-22 4:30 ` Richard Zhu
2021-10-21 16:00 ` Tim Harvey
2021-10-21 16:00 ` Tim Harvey
2021-10-21 16:00 ` Tim Harvey
2021-10-22 0:54 ` Richard Zhu
2021-10-22 0:54 ` Richard Zhu
2021-10-22 0:54 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 6/9] dt-bindings: imx6q-pcie: Add PHY phandles and name properties Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-18 19:18 ` Rob Herring
2021-10-18 19:18 ` Rob Herring
2021-10-18 19:18 ` Rob Herring
2021-10-22 2:04 ` Richard Zhu
2021-10-22 2:04 ` Richard Zhu
2021-10-22 2:04 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 7/9] arm64: dts: imx8mm: add the pcie support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 8/9] arm64: dts: imx8mm-evk: add the pcie support on imx8mm evk board Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-15 19:03 ` Lucas Stach
2021-10-15 19:03 ` Lucas Stach
2021-10-15 19:03 ` Lucas Stach
2021-10-22 2:07 ` Richard Zhu
2021-10-22 2:07 ` Richard Zhu
2021-10-22 2:07 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-13 12:45 ` Matthias Schiffer [this message]
2021-10-13 12:45 ` Matthias Schiffer
2021-10-13 12:45 ` Matthias Schiffer
2021-10-14 1:20 ` Richard Zhu
2021-10-14 1:20 ` Richard Zhu
2021-10-14 1:20 ` Richard Zhu
2021-10-15 19:00 ` Lucas Stach
2021-10-15 19:00 ` Lucas Stach
2021-10-15 19:00 ` Lucas Stach
2021-10-22 2:06 ` Richard Zhu
2021-10-22 2:06 ` Richard Zhu
2021-10-22 2:06 ` Richard Zhu
2021-10-15 19:58 ` [PATCH v3 0/9] add the imx8m pcie phy driver and " Tim Harvey
2021-10-15 19:58 ` Tim Harvey
2021-10-15 19:58 ` Tim Harvey
2021-10-19 2:10 ` Richard Zhu
2021-10-19 2:10 ` Richard Zhu
2021-10-19 2:10 ` Richard Zhu
2021-10-19 15:52 ` Tim Harvey
2021-10-19 15:52 ` Tim Harvey
2021-10-19 15:52 ` Tim Harvey
2021-10-20 2:10 ` Richard Zhu
2021-10-20 2:10 ` Richard Zhu
2021-10-20 2:10 ` Richard Zhu
2021-10-20 21:22 ` Tim Harvey
2021-10-20 21:22 ` Tim Harvey
2021-10-20 21:22 ` Tim Harvey
2021-10-21 3:32 ` Richard Zhu
2021-10-21 3:32 ` Richard Zhu
2021-10-21 3:32 ` Richard Zhu
2021-10-21 16:25 ` Tim Harvey
2021-10-21 16:25 ` Tim Harvey
2021-10-21 16:25 ` Tim Harvey
2021-10-22 0:43 ` Richard Zhu
2021-10-22 0:43 ` Richard Zhu
2021-10-22 0:43 ` Richard Zhu
2021-10-22 15:59 ` Tim Harvey
2021-10-22 15:59 ` Tim Harvey
2021-10-22 15:59 ` Tim Harvey
2021-10-22 16:55 ` Tim Harvey
2021-10-22 16:55 ` Tim Harvey
2021-10-22 16:55 ` Tim Harvey
2021-10-25 2:12 ` Richard Zhu
2021-10-25 2:12 ` Richard Zhu
2021-10-25 2:12 ` Richard Zhu
2021-10-25 7:23 ` Richard Zhu
2021-10-25 7:23 ` Richard Zhu
2021-10-25 7:23 ` Richard Zhu
2021-10-25 17:14 ` Tim Harvey
2021-10-25 17:14 ` Tim Harvey
2021-10-25 17:14 ` Tim Harvey
2021-10-26 5:41 ` Richard Zhu
2021-10-26 5:41 ` Richard Zhu
2021-10-26 5:41 ` Richard Zhu
2021-10-26 16:06 ` Tim Harvey
2021-10-26 16:06 ` Tim Harvey
2021-10-26 16:06 ` Tim Harvey
2021-10-27 6:18 ` Richard Zhu
2021-10-27 6:18 ` Richard Zhu
2021-10-27 6:18 ` Richard Zhu
2021-10-27 15:40 ` Tim Harvey
2021-10-27 15:40 ` Tim Harvey
2021-10-27 15:40 ` Tim Harvey
2021-10-28 1:51 ` Richard Zhu
2021-10-28 1:51 ` Richard Zhu
2021-10-28 1:51 ` Richard Zhu
2021-10-26 15:56 ` Marcel Ziswiler
2021-10-26 15:56 ` Marcel Ziswiler
2021-10-26 15:56 ` Marcel Ziswiler
2021-10-27 1:39 ` Richard Zhu
2021-10-27 1:39 ` Richard Zhu
2021-10-27 1:39 ` Richard Zhu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=00afb7b8bc6f7ad41cd6770532294992a667f1af.camel@ew.tq-group.com \
--to=matthias.schiffer@ew.tq-group.com \
--cc=devicetree@vger.kernel.org \
--cc=galak@kernel.crashing.org \
--cc=hongxing.zhu@nxp.com \
--cc=kernel@pengutronix.de \
--cc=kishon@ti.com \
--cc=l.stach@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=robh@kernel.org \
--cc=shawnguo@kernel.org \
--cc=tharvey@gateworks.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.