From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, tharvey@gateworks.com, kishon@ti.com,
vkoul@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: Re: [PATCH v3 6/9] dt-bindings: imx6q-pcie: Add PHY phandles and name properties
Date: Mon, 18 Oct 2021 14:18:14 -0500 [thread overview]
Message-ID: <YW3IdoS+zHa4x70Z@robh.at.kernel.org> (raw)
In-Reply-To: <1634028078-2387-7-git-send-email-hongxing.zhu@nxp.com>
On Tue, Oct 12, 2021 at 04:41:15PM +0800, Richard Zhu wrote:
> i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties
> in the binding document.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> index 2911e565b260..99d9863a69cd 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> @@ -128,6 +128,12 @@ properties:
> enum: [1, 2, 3, 4]
> default: 1
>
> + phys:
> + description: Phandle of the Generic PHY to the PCIe PHY.
maxItems: 1
And drop 'description'
> +
> + phy-names:
> + const: pcie-phy
> +
> reset-gpio:
> description: Should specify the GPIO for controlling the PCI bus device
> reset signal. It's not polarity aware and defaults to active-low reset
> --
> 2.25.1
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, tharvey@gateworks.com, kishon@ti.com,
vkoul@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: Re: [PATCH v3 6/9] dt-bindings: imx6q-pcie: Add PHY phandles and name properties
Date: Mon, 18 Oct 2021 14:18:14 -0500 [thread overview]
Message-ID: <YW3IdoS+zHa4x70Z@robh.at.kernel.org> (raw)
In-Reply-To: <1634028078-2387-7-git-send-email-hongxing.zhu@nxp.com>
On Tue, Oct 12, 2021 at 04:41:15PM +0800, Richard Zhu wrote:
> i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties
> in the binding document.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> index 2911e565b260..99d9863a69cd 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> @@ -128,6 +128,12 @@ properties:
> enum: [1, 2, 3, 4]
> default: 1
>
> + phys:
> + description: Phandle of the Generic PHY to the PCIe PHY.
maxItems: 1
And drop 'description'
> +
> + phy-names:
> + const: pcie-phy
> +
> reset-gpio:
> description: Should specify the GPIO for controlling the PCI bus device
> reset signal. It's not polarity aware and defaults to active-low reset
> --
> 2.25.1
>
>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, tharvey@gateworks.com, kishon@ti.com,
vkoul@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: Re: [PATCH v3 6/9] dt-bindings: imx6q-pcie: Add PHY phandles and name properties
Date: Mon, 18 Oct 2021 14:18:14 -0500 [thread overview]
Message-ID: <YW3IdoS+zHa4x70Z@robh.at.kernel.org> (raw)
In-Reply-To: <1634028078-2387-7-git-send-email-hongxing.zhu@nxp.com>
On Tue, Oct 12, 2021 at 04:41:15PM +0800, Richard Zhu wrote:
> i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties
> in the binding document.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> index 2911e565b260..99d9863a69cd 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> @@ -128,6 +128,12 @@ properties:
> enum: [1, 2, 3, 4]
> default: 1
>
> + phys:
> + description: Phandle of the Generic PHY to the PCIe PHY.
maxItems: 1
And drop 'description'
> +
> + phy-names:
> + const: pcie-phy
> +
> reset-gpio:
> description: Should specify the GPIO for controlling the PCI bus device
> reset signal. It's not polarity aware and defaults to active-low reset
> --
> 2.25.1
>
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-10-18 19:18 UTC|newest]
Thread overview: 144+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-12 8:41 [PATCH v3 0/9] add the imx8m pcie phy driver and imx8mm pcie support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 1/9] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 2/9] dt-bindings: phy: add imx8 pcie phy driver support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 13:18 ` Rob Herring
2021-10-12 13:18 ` Rob Herring
2021-10-12 13:18 ` Rob Herring
2021-10-12 23:46 ` Richard Zhu
2021-10-12 23:46 ` Richard Zhu
2021-10-12 23:46 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 3/9] arm64: dts: imx8mm: add the pcie phy support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-15 18:30 ` Lucas Stach
2021-10-15 18:30 ` Lucas Stach
2021-10-15 18:30 ` Lucas Stach
2021-10-22 1:57 ` Richard Zhu
2021-10-22 1:57 ` Richard Zhu
2021-10-22 1:57 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 4/9] arm64: dts: imx8mm-evk: " Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-15 18:32 ` Lucas Stach
2021-10-15 18:32 ` Lucas Stach
2021-10-15 18:32 ` Lucas Stach
2021-10-22 1:58 ` Richard Zhu
2021-10-22 1:58 ` Richard Zhu
2021-10-22 1:58 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 5/9] phy: freescale: pcie: initialize the imx8 pcie standalone phy driver Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-15 18:55 ` Lucas Stach
2021-10-15 18:55 ` Lucas Stach
2021-10-15 18:55 ` Lucas Stach
2021-10-22 4:30 ` Richard Zhu
2021-10-22 4:30 ` Richard Zhu
2021-10-22 4:30 ` Richard Zhu
2021-10-21 16:00 ` Tim Harvey
2021-10-21 16:00 ` Tim Harvey
2021-10-21 16:00 ` Tim Harvey
2021-10-22 0:54 ` Richard Zhu
2021-10-22 0:54 ` Richard Zhu
2021-10-22 0:54 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 6/9] dt-bindings: imx6q-pcie: Add PHY phandles and name properties Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-18 19:18 ` Rob Herring [this message]
2021-10-18 19:18 ` Rob Herring
2021-10-18 19:18 ` Rob Herring
2021-10-22 2:04 ` Richard Zhu
2021-10-22 2:04 ` Richard Zhu
2021-10-22 2:04 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 7/9] arm64: dts: imx8mm: add the pcie support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 8/9] arm64: dts: imx8mm-evk: add the pcie support on imx8mm evk board Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-15 19:03 ` Lucas Stach
2021-10-15 19:03 ` Lucas Stach
2021-10-15 19:03 ` Lucas Stach
2021-10-22 2:07 ` Richard Zhu
2021-10-22 2:07 ` Richard Zhu
2021-10-22 2:07 ` Richard Zhu
2021-10-12 8:41 ` [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-12 8:41 ` Richard Zhu
2021-10-13 12:45 ` Matthias Schiffer
2021-10-13 12:45 ` Matthias Schiffer
2021-10-13 12:45 ` Matthias Schiffer
2021-10-14 1:20 ` Richard Zhu
2021-10-14 1:20 ` Richard Zhu
2021-10-14 1:20 ` Richard Zhu
2021-10-15 19:00 ` Lucas Stach
2021-10-15 19:00 ` Lucas Stach
2021-10-15 19:00 ` Lucas Stach
2021-10-22 2:06 ` Richard Zhu
2021-10-22 2:06 ` Richard Zhu
2021-10-22 2:06 ` Richard Zhu
2021-10-15 19:58 ` [PATCH v3 0/9] add the imx8m pcie phy driver and " Tim Harvey
2021-10-15 19:58 ` Tim Harvey
2021-10-15 19:58 ` Tim Harvey
2021-10-19 2:10 ` Richard Zhu
2021-10-19 2:10 ` Richard Zhu
2021-10-19 2:10 ` Richard Zhu
2021-10-19 15:52 ` Tim Harvey
2021-10-19 15:52 ` Tim Harvey
2021-10-19 15:52 ` Tim Harvey
2021-10-20 2:10 ` Richard Zhu
2021-10-20 2:10 ` Richard Zhu
2021-10-20 2:10 ` Richard Zhu
2021-10-20 21:22 ` Tim Harvey
2021-10-20 21:22 ` Tim Harvey
2021-10-20 21:22 ` Tim Harvey
2021-10-21 3:32 ` Richard Zhu
2021-10-21 3:32 ` Richard Zhu
2021-10-21 3:32 ` Richard Zhu
2021-10-21 16:25 ` Tim Harvey
2021-10-21 16:25 ` Tim Harvey
2021-10-21 16:25 ` Tim Harvey
2021-10-22 0:43 ` Richard Zhu
2021-10-22 0:43 ` Richard Zhu
2021-10-22 0:43 ` Richard Zhu
2021-10-22 15:59 ` Tim Harvey
2021-10-22 15:59 ` Tim Harvey
2021-10-22 15:59 ` Tim Harvey
2021-10-22 16:55 ` Tim Harvey
2021-10-22 16:55 ` Tim Harvey
2021-10-22 16:55 ` Tim Harvey
2021-10-25 2:12 ` Richard Zhu
2021-10-25 2:12 ` Richard Zhu
2021-10-25 2:12 ` Richard Zhu
2021-10-25 7:23 ` Richard Zhu
2021-10-25 7:23 ` Richard Zhu
2021-10-25 7:23 ` Richard Zhu
2021-10-25 17:14 ` Tim Harvey
2021-10-25 17:14 ` Tim Harvey
2021-10-25 17:14 ` Tim Harvey
2021-10-26 5:41 ` Richard Zhu
2021-10-26 5:41 ` Richard Zhu
2021-10-26 5:41 ` Richard Zhu
2021-10-26 16:06 ` Tim Harvey
2021-10-26 16:06 ` Tim Harvey
2021-10-26 16:06 ` Tim Harvey
2021-10-27 6:18 ` Richard Zhu
2021-10-27 6:18 ` Richard Zhu
2021-10-27 6:18 ` Richard Zhu
2021-10-27 15:40 ` Tim Harvey
2021-10-27 15:40 ` Tim Harvey
2021-10-27 15:40 ` Tim Harvey
2021-10-28 1:51 ` Richard Zhu
2021-10-28 1:51 ` Richard Zhu
2021-10-28 1:51 ` Richard Zhu
2021-10-26 15:56 ` Marcel Ziswiler
2021-10-26 15:56 ` Marcel Ziswiler
2021-10-26 15:56 ` Marcel Ziswiler
2021-10-27 1:39 ` Richard Zhu
2021-10-27 1:39 ` Richard Zhu
2021-10-27 1:39 ` Richard Zhu
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