[PATCH v3 3/9] arm64: dts: imx8mm: add the pcie phy support

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From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, tharvey@gateworks.com, kishon@ti.com,
	vkoul@kernel.org, robh@kernel.org, galak@kernel.crashing.org,
	shawnguo@kernel.org
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	linux-imx@nxp.com, Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v3 3/9] arm64: dts: imx8mm: add the pcie phy support
Date: Tue, 12 Oct 2021 16:41:12 +0800	[thread overview]
Message-ID: <1634028078-2387-4-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1634028078-2387-1-git-send-email-hongxing.zhu@nxp.com>

Add the PCIe PHY support on iMX8MM platforms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index c2f3f118f82e..ac5d11466608 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1135,6 +1135,19 @@ usbmisc2: usbmisc@32e50200 {
 				reg = <0x32e50200 0x200>;
 			};
 
+			pcie_phy: pcie-phy@32f00000 {
+				compatible = "fsl,imx8mm-pcie-phy";
+				reg = <0x32f00000 0x10000>;
+				clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+				clock-names = "phy";
+				assigned-clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+				assigned-clock-rates = <100000000>;
+				assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_100M>;
+				resets = <&src IMX8MQ_RESET_PCIEPHY>;
+				reset-names = "pciephy";
+				#phy-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		dma_apbh: dma-controller@33000000 {
-- 
2.25.1

WARNING: multiple messages have this Message-ID (diff)

From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, tharvey@gateworks.com, kishon@ti.com,
	vkoul@kernel.org, robh@kernel.org, galak@kernel.crashing.org,
	shawnguo@kernel.org
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	linux-imx@nxp.com, Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v3 3/9] arm64: dts: imx8mm: add the pcie phy support
Date: Tue, 12 Oct 2021 16:41:12 +0800	[thread overview]
Message-ID: <1634028078-2387-4-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1634028078-2387-1-git-send-email-hongxing.zhu@nxp.com>

Add the PCIe PHY support on iMX8MM platforms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index c2f3f118f82e..ac5d11466608 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1135,6 +1135,19 @@ usbmisc2: usbmisc@32e50200 {
 				reg = <0x32e50200 0x200>;
 			};
 
+			pcie_phy: pcie-phy@32f00000 {
+				compatible = "fsl,imx8mm-pcie-phy";
+				reg = <0x32f00000 0x10000>;
+				clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+				clock-names = "phy";
+				assigned-clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+				assigned-clock-rates = <100000000>;
+				assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_100M>;
+				resets = <&src IMX8MQ_RESET_PCIEPHY>;
+				reset-names = "pciephy";
+				#phy-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		dma_apbh: dma-controller@33000000 {
-- 
2.25.1


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)

From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, tharvey@gateworks.com, kishon@ti.com,
	vkoul@kernel.org, robh@kernel.org, galak@kernel.crashing.org,
	shawnguo@kernel.org
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	linux-imx@nxp.com, Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v3 3/9] arm64: dts: imx8mm: add the pcie phy support
Date: Tue, 12 Oct 2021 16:41:12 +0800	[thread overview]
Message-ID: <1634028078-2387-4-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1634028078-2387-1-git-send-email-hongxing.zhu@nxp.com>

Add the PCIe PHY support on iMX8MM platforms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index c2f3f118f82e..ac5d11466608 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1135,6 +1135,19 @@ usbmisc2: usbmisc@32e50200 {
 				reg = <0x32e50200 0x200>;
 			};
 
+			pcie_phy: pcie-phy@32f00000 {
+				compatible = "fsl,imx8mm-pcie-phy";
+				reg = <0x32f00000 0x10000>;
+				clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+				clock-names = "phy";
+				assigned-clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+				assigned-clock-rates = <100000000>;
+				assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_100M>;
+				resets = <&src IMX8MQ_RESET_PCIEPHY>;
+				reset-names = "pciephy";
+				#phy-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		dma_apbh: dma-controller@33000000 {
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

next prev parent reply	other threads:[~2021-10-12  9:06 UTC|newest]

Thread overview: 144+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-12  8:41 [PATCH v3 0/9] add the imx8m pcie phy driver and imx8mm pcie support Richard Zhu
2021-10-12  8:41 ` Richard Zhu
2021-10-12  8:41 ` Richard Zhu
2021-10-12  8:41 ` [PATCH v3 1/9] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41 ` [PATCH v3 2/9] dt-bindings: phy: add imx8 pcie phy driver support Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12 13:18   ` Rob Herring
2021-10-12 13:18     ` Rob Herring
2021-10-12 13:18     ` Rob Herring
2021-10-12 23:46     ` Richard Zhu
2021-10-12 23:46       ` Richard Zhu
2021-10-12 23:46       ` Richard Zhu
2021-10-12  8:41 ` Richard Zhu [this message]
2021-10-12  8:41   ` [PATCH v3 3/9] arm64: dts: imx8mm: add the pcie phy support Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-15 18:30   ` Lucas Stach
2021-10-15 18:30     ` Lucas Stach
2021-10-15 18:30     ` Lucas Stach
2021-10-22  1:57     ` Richard Zhu
2021-10-22  1:57       ` Richard Zhu
2021-10-22  1:57       ` Richard Zhu
2021-10-12  8:41 ` [PATCH v3 4/9] arm64: dts: imx8mm-evk: " Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-15 18:32   ` Lucas Stach
2021-10-15 18:32     ` Lucas Stach
2021-10-15 18:32     ` Lucas Stach
2021-10-22  1:58     ` Richard Zhu
2021-10-22  1:58       ` Richard Zhu
2021-10-22  1:58       ` Richard Zhu
2021-10-12  8:41 ` [PATCH v3 5/9] phy: freescale: pcie: initialize the imx8 pcie standalone phy driver Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-15 18:55   ` Lucas Stach
2021-10-15 18:55     ` Lucas Stach
2021-10-15 18:55     ` Lucas Stach
2021-10-22  4:30     ` Richard Zhu
2021-10-22  4:30       ` Richard Zhu
2021-10-22  4:30       ` Richard Zhu
2021-10-21 16:00   ` Tim Harvey
2021-10-21 16:00     ` Tim Harvey
2021-10-21 16:00     ` Tim Harvey
2021-10-22  0:54     ` Richard Zhu
2021-10-22  0:54       ` Richard Zhu
2021-10-22  0:54       ` Richard Zhu
2021-10-12  8:41 ` [PATCH v3 6/9] dt-bindings: imx6q-pcie: Add PHY phandles and name properties Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-18 19:18   ` Rob Herring
2021-10-18 19:18     ` Rob Herring
2021-10-18 19:18     ` Rob Herring
2021-10-22  2:04     ` Richard Zhu
2021-10-22  2:04       ` Richard Zhu
2021-10-22  2:04       ` Richard Zhu
2021-10-12  8:41 ` [PATCH v3 7/9] arm64: dts: imx8mm: add the pcie support Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41 ` [PATCH v3 8/9] arm64: dts: imx8mm-evk: add the pcie support on imx8mm evk board Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-15 19:03   ` Lucas Stach
2021-10-15 19:03     ` Lucas Stach
2021-10-15 19:03     ` Lucas Stach
2021-10-22  2:07     ` Richard Zhu
2021-10-22  2:07       ` Richard Zhu
2021-10-22  2:07       ` Richard Zhu
2021-10-12  8:41 ` [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-12  8:41   ` Richard Zhu
2021-10-13 12:45   ` Matthias Schiffer
2021-10-13 12:45     ` Matthias Schiffer
2021-10-13 12:45     ` Matthias Schiffer
2021-10-14  1:20     ` Richard Zhu
2021-10-14  1:20       ` Richard Zhu
2021-10-14  1:20       ` Richard Zhu
2021-10-15 19:00   ` Lucas Stach
2021-10-15 19:00     ` Lucas Stach
2021-10-15 19:00     ` Lucas Stach
2021-10-22  2:06     ` Richard Zhu
2021-10-22  2:06       ` Richard Zhu
2021-10-22  2:06       ` Richard Zhu
2021-10-15 19:58 ` [PATCH v3 0/9] add the imx8m pcie phy driver and " Tim Harvey
2021-10-15 19:58   ` Tim Harvey
2021-10-15 19:58   ` Tim Harvey
2021-10-19  2:10   ` Richard Zhu
2021-10-19  2:10     ` Richard Zhu
2021-10-19  2:10     ` Richard Zhu
2021-10-19 15:52     ` Tim Harvey
2021-10-19 15:52       ` Tim Harvey
2021-10-19 15:52       ` Tim Harvey
2021-10-20  2:10       ` Richard Zhu
2021-10-20  2:10         ` Richard Zhu
2021-10-20  2:10         ` Richard Zhu
2021-10-20 21:22         ` Tim Harvey
2021-10-20 21:22           ` Tim Harvey
2021-10-20 21:22           ` Tim Harvey
2021-10-21  3:32           ` Richard Zhu
2021-10-21  3:32             ` Richard Zhu
2021-10-21  3:32             ` Richard Zhu
2021-10-21 16:25             ` Tim Harvey
2021-10-21 16:25               ` Tim Harvey
2021-10-21 16:25               ` Tim Harvey
2021-10-22  0:43               ` Richard Zhu
2021-10-22  0:43                 ` Richard Zhu
2021-10-22  0:43                 ` Richard Zhu
2021-10-22 15:59                 ` Tim Harvey
2021-10-22 15:59                   ` Tim Harvey
2021-10-22 15:59                   ` Tim Harvey
2021-10-22 16:55                   ` Tim Harvey
2021-10-22 16:55                     ` Tim Harvey
2021-10-22 16:55                     ` Tim Harvey
2021-10-25  2:12                     ` Richard Zhu
2021-10-25  2:12                       ` Richard Zhu
2021-10-25  2:12                       ` Richard Zhu
2021-10-25  7:23                       ` Richard Zhu
2021-10-25  7:23                         ` Richard Zhu
2021-10-25  7:23                         ` Richard Zhu
2021-10-25 17:14                         ` Tim Harvey
2021-10-25 17:14                           ` Tim Harvey
2021-10-25 17:14                           ` Tim Harvey
2021-10-26  5:41                           ` Richard Zhu
2021-10-26  5:41                             ` Richard Zhu
2021-10-26  5:41                             ` Richard Zhu
2021-10-26 16:06                             ` Tim Harvey
2021-10-26 16:06                               ` Tim Harvey
2021-10-26 16:06                               ` Tim Harvey
2021-10-27  6:18                               ` Richard Zhu
2021-10-27  6:18                                 ` Richard Zhu
2021-10-27  6:18                                 ` Richard Zhu
2021-10-27 15:40                                 ` Tim Harvey
2021-10-27 15:40                                   ` Tim Harvey
2021-10-27 15:40                                   ` Tim Harvey
2021-10-28  1:51                                   ` Richard Zhu
2021-10-28  1:51                                     ` Richard Zhu
2021-10-28  1:51                                     ` Richard Zhu
2021-10-26 15:56 ` Marcel Ziswiler
2021-10-26 15:56   ` Marcel Ziswiler
2021-10-26 15:56   ` Marcel Ziswiler
2021-10-27  1:39   ` Richard Zhu
2021-10-27  1:39     ` Richard Zhu
2021-10-27  1:39     ` Richard Zhu

find likely ancestor, descendant, or conflicting patches for this message:
dfblob:c2f3f118f82 dfblob:c2f3f118f82 dfblob:c2f3f118f82
dfblob:ac5d1146660 dfblob:ac5d1146660 dfblob:ac5d1146660
	(help)

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