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From: "Van De Ven, Arjan" <arjan.van.de.ven@intel.com>
To: "valdis.kletnieks@vt.edu" <valdis.kletnieks@vt.edu>
Cc: Jon Masters <jcm@jonmasters.org>,
	David Woodhouse <dwmw2@infradead.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"x86@kernel.org" <x86@kernel.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Hansen, Dave" <dave.hansen@intel.com>,
	"Ingo Molnar" <mingo@kernel.org>
Subject: RE: [PATCH 2/2] x86/speculation: Support "Enhanced IBRS" on future CPUs
Date: Tue, 20 Feb 2018 00:00:23 +0000	[thread overview]
Message-ID: <0575AF4FD06DD142AD198903C74E1CC87A619255@ORSMSX103.amr.corp.intel.com> (raw)
In-Reply-To: <10373.1519084385@turing-police.cc.vt.edu>


> On Mon, 19 Feb 2018 23:42:24 +0000, "Van De Ven, Arjan" said:
> 
> > the guest is not the problem; guests obviously will already honor if Enhanced
> > IBRS is enumerated. The problem is mixed migration pools where the
> hypervisor
> > may need to decide to not pass this enumeration through to the guest.
> 
> For bonus points:  What should happen to a VM that is live migrated from one
> hypervisor to another, and the hypervisors have different IBRS support?

Doctor Doctor it hurts when I do this....

Migration tends to only work between HV's that are relatively homogeneous, that's nothing new... folks who run clouds or bigger pools know this obviously.

  reply	other threads:[~2018-02-20  0:00 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-12 15:27 [PATCH 1/2] x86/speculation: Correct Speculation Control microcode blacklist again David Woodhouse
2018-02-12 15:27 ` [PATCH 2/2] x86/speculation: Support "Enhanced IBRS" on future CPUs David Woodhouse
2018-02-13  7:47   ` Ingo Molnar
2018-02-13  8:12     ` David Woodhouse
2018-02-13  8:02   ` Paolo Bonzini
2018-02-13  8:15     ` David Woodhouse
2018-02-13  9:58       ` Paolo Bonzini
2018-02-13 10:21         ` David Woodhouse
2018-02-13 10:36           ` David Woodhouse
2018-02-13 10:41             ` Paolo Bonzini
2018-02-13 10:53               ` David Woodhouse
2018-02-13 10:55                 ` Paolo Bonzini
2018-02-16  9:58               ` David Woodhouse
2018-02-16 10:08                 ` Paolo Bonzini
2018-02-16 10:21                   ` David Woodhouse
2018-02-16 11:04                     ` Paolo Bonzini
2018-02-16 12:10                       ` David Woodhouse
2018-02-19 23:37                         ` Jon Masters
2018-02-19 23:42                           ` Van De Ven, Arjan
2018-02-19 23:53                             ` valdis.kletnieks
2018-02-20  0:00                               ` Van De Ven, Arjan [this message]
2018-02-20  0:13                                 ` Alan Cox
2018-02-20  0:43                                   ` Linus Torvalds
2018-02-20  1:03                                     ` Alan Cox
2018-02-20  1:08                                       ` Van De Ven, Arjan
2018-02-20  8:52                                     ` Thomas Gleixner
2018-02-20 11:43                                 ` Paolo Bonzini
2018-02-20 14:08                                   ` Van De Ven, Arjan
2018-02-20 14:46                                     ` Paolo Bonzini
2018-02-20 14:59                                       ` Van De Ven, Arjan
2018-02-20 15:09                                         ` Paolo Bonzini
2018-02-23 18:12                                       ` Is: RSB Alternative bit in IA32_ARCH_CAPABILITIES Was:Re: " Konrad Rzeszutek Wilk
2018-02-23 18:18                                         ` Van De Ven, Arjan
2018-02-15 15:21     ` Pavel Machek
2018-02-13  8:57 ` [tip:x86/pti] x86/speculation: Correct Speculation Control microcode blacklist again tip-bot for David Woodhouse

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