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From: David Woodhouse <dwmw2@infradead.org>
To: Paolo Bonzini <pbonzini@redhat.com>,
	tglx@linutronix.de, x86@kernel.org, kvm@vger.kernel.org,
	torvalds@linux-foundation.org, linux-kernel@vger.kernel.org,
	arjan.van.de.ven@intel.com, dave.hansen@intel.com
Cc: Ingo Molnar <mingo@kernel.org>
Subject: Re: [PATCH 2/2] x86/speculation: Support "Enhanced IBRS" on future CPUs
Date: Fri, 16 Feb 2018 10:21:57 +0000	[thread overview]
Message-ID: <1518776517.7876.21.camel@infradead.org> (raw)
In-Reply-To: <75287047-77a0-e0ff-c2e8-61c81641251e@redhat.com>

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On Fri, 2018-02-16 at 11:08 +0100, Paolo Bonzini wrote:
> On 16/02/2018 10:58, David Woodhouse wrote:
> > 
> > On Tue, 2018-02-13 at 11:41 +0100, Paolo Bonzini wrote:
> > 
> > > 
> > > On 13/02/2018 11:36, David Woodhouse wrote:
> > > > 
> > > > > 
> > > > > > 
> > > > > > - if the VM has IBRS_ALL, pass through the MSR when it is zero and
> > > > > > intercept writes when it is one (no writes should happen)
> > > > > >  
> > > > > > - if the VM doesn't have IBRS_ALL, do as we are doing now, independent
> > > > > > of what the host spectre_v2_ibrs_all() setting is.
> > > > > We end up having to turn IBRS on again on vmexit then, taking care that
> > > > > no conditional branch can go round it. So that becomes an
> > > > > *unconditional* wrmsr or lfence in the vmexit path. We really don't
> > > > > want that.
> > > > > 
> > > > Note that being able to keep it simple in KVM was basically what made
> > > > the difference between me tolerating IBRS_ALL as Intel currently define
> > > > it, and throwing my toys out of the pram (as I had done in the first
> > > > iterations of this patch).
> > >  
> > > You have my vote. :)
> > 
> > I was taking that as assent to the patch... could I trouble you for an
> > explicit ack, please?
>
> No, it's a vote for throwing the toys out of the pram (or running away
> with the ball, if you prefer).
> 
> Unfortunately, if you want to have a higher-performance mode for
> IBRS_ALL that avoids rdmsr on vmexit, you have to do it as sketched above.


Why? With IBRS_ALL the guest *never* gets to affect the actual hardware
MSR, which is always on. The MSR is purely an emulated no-op. Why does
that affect migration?

Even if the guest doesn't have/support IBRS_ALL, and is frobbing the
(now emulated) MSR on every kernel entry/exit, that's *still* going to
be a metric shitload faster than what it *thought* it was doing.

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  reply	other threads:[~2018-02-16 10:22 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-12 15:27 [PATCH 1/2] x86/speculation: Correct Speculation Control microcode blacklist again David Woodhouse
2018-02-12 15:27 ` [PATCH 2/2] x86/speculation: Support "Enhanced IBRS" on future CPUs David Woodhouse
2018-02-13  7:47   ` Ingo Molnar
2018-02-13  8:12     ` David Woodhouse
2018-02-13  8:02   ` Paolo Bonzini
2018-02-13  8:15     ` David Woodhouse
2018-02-13  9:58       ` Paolo Bonzini
2018-02-13 10:21         ` David Woodhouse
2018-02-13 10:36           ` David Woodhouse
2018-02-13 10:41             ` Paolo Bonzini
2018-02-13 10:53               ` David Woodhouse
2018-02-13 10:55                 ` Paolo Bonzini
2018-02-16  9:58               ` David Woodhouse
2018-02-16 10:08                 ` Paolo Bonzini
2018-02-16 10:21                   ` David Woodhouse [this message]
2018-02-16 11:04                     ` Paolo Bonzini
2018-02-16 12:10                       ` David Woodhouse
2018-02-19 23:37                         ` Jon Masters
2018-02-19 23:42                           ` Van De Ven, Arjan
2018-02-19 23:53                             ` valdis.kletnieks
2018-02-20  0:00                               ` Van De Ven, Arjan
2018-02-20  0:13                                 ` Alan Cox
2018-02-20  0:43                                   ` Linus Torvalds
2018-02-20  1:03                                     ` Alan Cox
2018-02-20  1:08                                       ` Van De Ven, Arjan
2018-02-20  8:52                                     ` Thomas Gleixner
2018-02-20 11:43                                 ` Paolo Bonzini
2018-02-20 14:08                                   ` Van De Ven, Arjan
2018-02-20 14:46                                     ` Paolo Bonzini
2018-02-20 14:59                                       ` Van De Ven, Arjan
2018-02-20 15:09                                         ` Paolo Bonzini
2018-02-23 18:12                                       ` Is: RSB Alternative bit in IA32_ARCH_CAPABILITIES Was:Re: " Konrad Rzeszutek Wilk
2018-02-23 18:18                                         ` Van De Ven, Arjan
2018-02-15 15:21     ` Pavel Machek
2018-02-13  8:57 ` [tip:x86/pti] x86/speculation: Correct Speculation Control microcode blacklist again tip-bot for David Woodhouse

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