From: "Van De Ven, Arjan" <arjan.van.de.ven@intel.com>
To: Alan Cox <gnomes@lxorguk.ukuu.org.uk>,
Linus Torvalds <torvalds@linux-foundation.org>
Cc: "valdis.kletnieks@vt.edu" <valdis.kletnieks@vt.edu>,
Jon Masters <jcm@jonmasters.org>,
David Woodhouse <dwmw2@infradead.org>,
Paolo Bonzini <pbonzini@redhat.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"x86@kernel.org" <x86@kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Hansen, Dave" <dave.hansen@intel.com>,
Ingo Molnar <mingo@kernel.org>
Subject: RE: [PATCH 2/2] x86/speculation: Support "Enhanced IBRS" on future CPUs
Date: Tue, 20 Feb 2018 01:08:32 +0000 [thread overview]
Message-ID: <0575AF4FD06DD142AD198903C74E1CC87A619290@ORSMSX103.amr.corp.intel.com> (raw)
In-Reply-To: <20180220010319.19c60053@alans-desktop>
> > On Mon, Feb 19, 2018 at 4:13 PM, Alan Cox <gnomes@lxorguk.ukuu.org.uk>
> wrote:
> > >
> > > In theory there's nothing stopping a guest getting a 'you are about to
> > > gain/lose IBRS' message or having a new 'CPU' hotplugged and the old one
> > > removed.
> >
> > I'm not convinced we handle the case of hotplug CPU's with different
> > CPU models correctly.
>
> We don't. And even if we did the user space doesn't. It would be a
> painful task to resolve.
in a cloud world it ends up being the launch/restart of the VM in reality.
Just the JIT caches all over in userspace make this case not pretty.
And we as kernel don't even really do mixed cpus without hotplug afaict
(other than maybe taking lowest subset, while the case here would be the opposite direction)
next prev parent reply other threads:[~2018-02-20 1:08 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-12 15:27 [PATCH 1/2] x86/speculation: Correct Speculation Control microcode blacklist again David Woodhouse
2018-02-12 15:27 ` [PATCH 2/2] x86/speculation: Support "Enhanced IBRS" on future CPUs David Woodhouse
2018-02-13 7:47 ` Ingo Molnar
2018-02-13 8:12 ` David Woodhouse
2018-02-13 8:02 ` Paolo Bonzini
2018-02-13 8:15 ` David Woodhouse
2018-02-13 9:58 ` Paolo Bonzini
2018-02-13 10:21 ` David Woodhouse
2018-02-13 10:36 ` David Woodhouse
2018-02-13 10:41 ` Paolo Bonzini
2018-02-13 10:53 ` David Woodhouse
2018-02-13 10:55 ` Paolo Bonzini
2018-02-16 9:58 ` David Woodhouse
2018-02-16 10:08 ` Paolo Bonzini
2018-02-16 10:21 ` David Woodhouse
2018-02-16 11:04 ` Paolo Bonzini
2018-02-16 12:10 ` David Woodhouse
2018-02-19 23:37 ` Jon Masters
2018-02-19 23:42 ` Van De Ven, Arjan
2018-02-19 23:53 ` valdis.kletnieks
2018-02-20 0:00 ` Van De Ven, Arjan
2018-02-20 0:13 ` Alan Cox
2018-02-20 0:43 ` Linus Torvalds
2018-02-20 1:03 ` Alan Cox
2018-02-20 1:08 ` Van De Ven, Arjan [this message]
2018-02-20 8:52 ` Thomas Gleixner
2018-02-20 11:43 ` Paolo Bonzini
2018-02-20 14:08 ` Van De Ven, Arjan
2018-02-20 14:46 ` Paolo Bonzini
2018-02-20 14:59 ` Van De Ven, Arjan
2018-02-20 15:09 ` Paolo Bonzini
2018-02-23 18:12 ` Is: RSB Alternative bit in IA32_ARCH_CAPABILITIES Was:Re: " Konrad Rzeszutek Wilk
2018-02-23 18:18 ` Van De Ven, Arjan
2018-02-15 15:21 ` Pavel Machek
2018-02-13 8:57 ` [tip:x86/pti] x86/speculation: Correct Speculation Control microcode blacklist again tip-bot for David Woodhouse
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