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From: "Shankar, Uma" <uma.shankar@intel.com>
To: Harry Wentland <harry.wentland@amd.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Cc: "sebastian@sebastianwick.net" <sebastian@sebastianwick.net>,
	"Shashank.Sharma@amd.com" <Shashank.Sharma@amd.com>
Subject: RE: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
Date: Thu, 25 Nov 2021 20:43:19 +0000	[thread overview]
Message-ID: <062cb4bfe0d94fb9aa34845b413e9021@intel.com> (raw)
In-Reply-To: <2a2684e6-f5d6-c917-6f0c-8dc3704ddaf6@amd.com>



> -----Original Message-----
> From: Harry Wentland <harry.wentland@amd.com>
> Sent: Tuesday, November 23, 2021 8:35 PM
> To: Shankar, Uma <uma.shankar@intel.com>; intel-gfx@lists.freedesktop.org; dri-
> devel@lists.freedesktop.org
> Cc: ville.syrjala@linux.intel.com; ppaalanen@gmail.com; brian.starkey@arm.com;
> sebastian@sebastianwick.net; Shashank.Sharma@amd.com
> Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
> 
> 
> 
> On 2021-09-06 17:38, Uma Shankar wrote:
> > This is a RFC proposal for plane color hardware blocks.
> > It exposes the property interface to userspace and calls out the
> > details or interfaces created and the intended purpose.
> >
> > Credits: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> >  Documentation/gpu/rfc/drm_color_pipeline.rst | 167
> > +++++++++++++++++++
> >  1 file changed, 167 insertions(+)
> >  create mode 100644 Documentation/gpu/rfc/drm_color_pipeline.rst
> >
> > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst
> > b/Documentation/gpu/rfc/drm_color_pipeline.rst
> > new file mode 100644
> > index 000000000000..0d1ca858783b
> > --- /dev/null
> > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst
> > @@ -0,0 +1,167 @@
> > +==================================================
> > +Display Color Pipeline: Proposed DRM Properties
> > +==================================================
> > +
> > +This is how a typical display color hardware pipeline looks like:
> > + +-------------------------------------------+
> > + |                RAM                        |
> > + |  +------+    +---------+    +---------+   |
> > + |  | FB 1 |    |  FB 2   |    | FB N    |   |
> > + |  +------+    +---------+    +---------+   |
> > + +-------------------------------------------+
> > +       |  Plane Color Hardware Block |
> > + +--------------------------------------------+
> > + | +---v-----+   +---v-------+   +---v------+ |
> > + | | Plane A |   | Plane B   |   | Plane N  | |
> > + | | DeGamma |   | Degamma   |   | Degamma  | |
> > + | +---+-----+   +---+-------+   +---+------+ |
> > + |     |             |               |        |
> > + | +---v-----+   +---v-------+   +---v------+ |
> > + | |Plane A  |   | Plane B   |   | Plane N  | |
> > + | |CSC/CTM  |   | CSC/CTM   |   | CSC/CTM  | |
> > + | +---+-----+   +----+------+   +----+-----+ |
> > + |     |              |               |       |
> > + | +---v-----+   +----v------+   +----v-----+ |
> > + | | Plane A |   | Plane B   |   | Plane N  | |
> > + | | Gamma   |   | Gamma     |   | Gamma    | |
> > + | +---+-----+   +----+------+   +----+-----+ |
> > + |     |              |               |       |
> > + +--------------------------------------------+
> > ++------v--------------v---------------v-------|
> > +||                                           ||
> > +||           Pipe Blender                    ||
> > ++--------------------+------------------------+
> > +|                    |                        |
> > +|        +-----------v----------+             |
> > +|        |  Pipe DeGamma        |             |
> > +|        |                      |             |
> > +|        +-----------+----------+             |
> > +|                    |            Pipe Color  |
> > +|        +-----------v----------+ Hardware    |
> > +|        |  Pipe CSC/CTM        |             |
> > +|        |                      |             |
> > +|        +-----------+----------+             |
> > +|                    |                        |
> > +|        +-----------v----------+             |
> > +|        |  Pipe Gamma          |             |
> > +|        |                      |             |
> > +|        +-----------+----------+             |
> > +|                    |                        |
> > ++---------------------------------------------+
> > +                     |
> > +                     v
> > +               Pipe Output
> > +
> 
> This diagram defines what happens before and after the blending space but did
> where does scaling fit into it? Scaling can look different when performed in linear or
> non-linear space so I think it is important to define where in the pipeline it sits.
> 
> In my view scaling would happen between plane degamma and plane CSC.

Yeah we can add scaling as well to make it clear. Scaling ideally should happen after
Degamma. In intel's case it is after the CSC.

Regards,
Uma Shankar

> Harry
> 
> > +Proposal is to have below properties for a plane:
> > +
> > +* Plane Degamma or Pre-Curve:
> > +	* This will be used to linearize the input framebuffer data.
> > +	* It will apply the reverse of the color transfer function.
> > +	* It can be a degamma curve or OETF for HDR.
> > +	* This linear data can be further acted on by the following
> > +	* color hardware blocks in the display hardware pipeline
> > +
> > +UAPI Name: PLANE_DEGAMMA_MODE
> > +Description: Enum property with values as blob_id's which advertizes the
> > +	    possible degamma modes and lut ranges supported by the platform.
> > +	    This  allows userspace to query and get the plane degamma color
> > +	    caps and choose the appropriate degamma mode and create lut values
> > +	    accordingly.
> > +
> > +UAPI Name: PLANE_DEGAMMA_LUT
> > +Description: Blob property which allows a userspace to provide LUT values
> > +	     to apply degamma curve using the h/w plane degamma processing
> > +	     engine, thereby making the content as linear for further color
> > +	     processing. Userspace gets the size of LUT and precision etc
> > +	     from PLANE_DEGAMA_MODE_PROPERTY
> > +
> > +* Plane CTM
> > +	* This is a Property to program the color transformation matrix.
> > +	* This can be used to perform a color space conversion like
> > +	* BT2020 to BT709 or BT601 etc.
> > +	* This block is generally kept after the degamma unit so that
> > +	* linear data can be fed to it for conversion.
> > +
> > +UAPI Name: PLANE_CTM
> > +Description: Blob property which allows a userspace to provide CTM coefficients
> > +	     to do color space conversion or any other enhancement by doing a
> > +	     matrix multiplication using the h/w CTM processing engine
> > +
> > +* Plane Gamma or Post-Curve
> > +	* This can be used to perform 2 operations:
> > +		* non-lineralize the framebuffer data. Can be used for
> > +		* non linear blending. It can be a gamma curve or EOTF
> > +		* for HDR.
> > +		* Perform Tone Mapping operation. This is an operation
> > +		* done when blending is done with HDR and SDR content.
> > +
> > +UAPI Name: PLANE_GAMMA_MODE
> > +Description: Enum property with values as blob_id's which advertizes the
> > +	    possible gamma modes and lut ranges supported by the platform.
> > +	    This  allows userspace to query and get the plane gamma color
> > +	    caps and choose the appropriate gamma mode and create lut values
> > +	    accordingly.
> > +
> > +UAPI Name: PLANE_GAMMA_LUT
> > +Description: Blob property which allows a userspace to provide LUT values
> > +	     to apply gamma curve or perform tone mapping using the h/w plane
> > +	     gamma processing engine, thereby making the content as linear
> > +	     for further color processing. Userspace gets the size of LUT and
> > +	     precision etc from PLANE_GAMA_MODE_PROPERTY
> > +
> > +This is part of one plane engine. Data from multiple planes will be
> > +then fed to pipe where it will get blended. There is a similar set of
> > +properties available at crtc level which acts on this blended data.
> > +
> > +Below is a sample usecase:
> > +
> > +  ┌────────────┐      ┌─────────────┐     ┌─────────────┐
> ┌─────────────┐
> > +  │FB1         │      │Degamma Block│     │ CTM Matrix  │     │ Gamma Block │
> > +  │            ├─────►│Linearize-   ├────►│ BT709 to    ├────►│ SDR to HDR  │
> > +  │BT709 SDR   │      │BT709 inverse│     │ BT2020      │     │ Tone
> Mapping├────────┐
> > +  └────────────┘      └─────────────┘     └─────────────┘
> └─────────────┘        │
> > +                                                                                     │
> > +  ┌────────────┐      ┌─────────────┐     ┌─────────────┐
> ┌─────────────┐        │
> > +  │FB2         │      │Degamma Block│     │ CTM Matrix  │     │ Gamma Block │        │
> > +  │            ├─────►│Linearize-   ├────►│ BT601 to    ├────►│ SDR to HDR
> ├─────┐  │
> > +  │BT601 SDR   │      │BT601 inverse│     │ BT2020      │     │ Tone Mapping│     │  │
> > +  └────────────┘      └─────────────┘     └─────────────┘
> └─────────────┘     │  │
> > +                                                                                  │  │
> > +  ┌────────────┐      ┌─────────────┐     ┌─────────────┐
> ┌─────────────┐     │  │
> > +  │FB3         │      │Degamma Block│     │ CTM Matrix  │     │ Gamma Block │     │  │
> > +  │            ├─────►│Linearize-   ├────►│ NOP (Data in├────►│ NOP (Data
> in├───┐ │  │
> > +  │BT2020 HDR  │      │HDR OETF     │     │ BT2020)     │     │ HDR)        │   │ │  │
> > +  └────────────┘      └─────────────┘     └─────────────┘
> └─────────────┘   │ │  │
> > +                                                                                │ │  │
> > +                                                                                │ │  │
> > +
> > +│ │  │
> >
> +┌──────────────────────────────────────────────────────────────────
> ──
> > +───────────┴─┴──┘
> > +│
> > +│ ┌─────────────┐      ┌─────────────┐      ┌───────────────┐
> > +│ │ CRTC Degamma│      │ CRTC CTM    │      │ CRTC Gamma    │
> > +└─┤ Use to make ├─────►│ Use for any ├─────►│ Use for Tone  ├─────►
> TO Port
> > +  │ data linear │      │ Color Space │      │ Mapping/apply │
> > +  │ after blend │      │ Conversion  │      │ transfer func │
> > +  └─────────────┘      └─────────────┘      └───────────────┘
> > +
> > +
> > +This patch series adds properties for plane color features. It adds
> > +properties for degamma used to linearize data and CSC used for gamut
> > +conversion. It also includes Gamma support used to again
> > +non-linearize data as per panel supported color space. These can be
> > +utilize by user space to convert planes from one format to another,
> > +one color space to another etc.
> > +
> > +Userspace can take smart blending decisions and utilize these
> > +hardware supported plane color features to get accurate color
> > +profile. The same can help in consistent color quality from source to
> > +panel taking advantage of advanced color features in hardware.
> > +
> > +These patches add the property interfaces and enable helper functions.
> > +This series adds Intel's XE_LPD hw specific plane gamma feature. We
> > +can build up and add other platform/hardware specific implementation
> > +on top of this series.
> > +
> > +Credits: Special mention and credits to Ville Syrjala for coming up
> > +with a design for this feature and inputs. This series is based on
> > +his original design and idea.
> >


WARNING: multiple messages have this Message-ID (diff)
From: "Shankar, Uma" <uma.shankar@intel.com>
To: Harry Wentland <harry.wentland@amd.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Cc: "sebastian@sebastianwick.net" <sebastian@sebastianwick.net>,
	"ppaalanen@gmail.com" <ppaalanen@gmail.com>
Subject: Re: [Intel-gfx] [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
Date: Thu, 25 Nov 2021 20:43:19 +0000	[thread overview]
Message-ID: <062cb4bfe0d94fb9aa34845b413e9021@intel.com> (raw)
In-Reply-To: <2a2684e6-f5d6-c917-6f0c-8dc3704ddaf6@amd.com>



> -----Original Message-----
> From: Harry Wentland <harry.wentland@amd.com>
> Sent: Tuesday, November 23, 2021 8:35 PM
> To: Shankar, Uma <uma.shankar@intel.com>; intel-gfx@lists.freedesktop.org; dri-
> devel@lists.freedesktop.org
> Cc: ville.syrjala@linux.intel.com; ppaalanen@gmail.com; brian.starkey@arm.com;
> sebastian@sebastianwick.net; Shashank.Sharma@amd.com
> Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
> 
> 
> 
> On 2021-09-06 17:38, Uma Shankar wrote:
> > This is a RFC proposal for plane color hardware blocks.
> > It exposes the property interface to userspace and calls out the
> > details or interfaces created and the intended purpose.
> >
> > Credits: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> >  Documentation/gpu/rfc/drm_color_pipeline.rst | 167
> > +++++++++++++++++++
> >  1 file changed, 167 insertions(+)
> >  create mode 100644 Documentation/gpu/rfc/drm_color_pipeline.rst
> >
> > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst
> > b/Documentation/gpu/rfc/drm_color_pipeline.rst
> > new file mode 100644
> > index 000000000000..0d1ca858783b
> > --- /dev/null
> > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst
> > @@ -0,0 +1,167 @@
> > +==================================================
> > +Display Color Pipeline: Proposed DRM Properties
> > +==================================================
> > +
> > +This is how a typical display color hardware pipeline looks like:
> > + +-------------------------------------------+
> > + |                RAM                        |
> > + |  +------+    +---------+    +---------+   |
> > + |  | FB 1 |    |  FB 2   |    | FB N    |   |
> > + |  +------+    +---------+    +---------+   |
> > + +-------------------------------------------+
> > +       |  Plane Color Hardware Block |
> > + +--------------------------------------------+
> > + | +---v-----+   +---v-------+   +---v------+ |
> > + | | Plane A |   | Plane B   |   | Plane N  | |
> > + | | DeGamma |   | Degamma   |   | Degamma  | |
> > + | +---+-----+   +---+-------+   +---+------+ |
> > + |     |             |               |        |
> > + | +---v-----+   +---v-------+   +---v------+ |
> > + | |Plane A  |   | Plane B   |   | Plane N  | |
> > + | |CSC/CTM  |   | CSC/CTM   |   | CSC/CTM  | |
> > + | +---+-----+   +----+------+   +----+-----+ |
> > + |     |              |               |       |
> > + | +---v-----+   +----v------+   +----v-----+ |
> > + | | Plane A |   | Plane B   |   | Plane N  | |
> > + | | Gamma   |   | Gamma     |   | Gamma    | |
> > + | +---+-----+   +----+------+   +----+-----+ |
> > + |     |              |               |       |
> > + +--------------------------------------------+
> > ++------v--------------v---------------v-------|
> > +||                                           ||
> > +||           Pipe Blender                    ||
> > ++--------------------+------------------------+
> > +|                    |                        |
> > +|        +-----------v----------+             |
> > +|        |  Pipe DeGamma        |             |
> > +|        |                      |             |
> > +|        +-----------+----------+             |
> > +|                    |            Pipe Color  |
> > +|        +-----------v----------+ Hardware    |
> > +|        |  Pipe CSC/CTM        |             |
> > +|        |                      |             |
> > +|        +-----------+----------+             |
> > +|                    |                        |
> > +|        +-----------v----------+             |
> > +|        |  Pipe Gamma          |             |
> > +|        |                      |             |
> > +|        +-----------+----------+             |
> > +|                    |                        |
> > ++---------------------------------------------+
> > +                     |
> > +                     v
> > +               Pipe Output
> > +
> 
> This diagram defines what happens before and after the blending space but did
> where does scaling fit into it? Scaling can look different when performed in linear or
> non-linear space so I think it is important to define where in the pipeline it sits.
> 
> In my view scaling would happen between plane degamma and plane CSC.

Yeah we can add scaling as well to make it clear. Scaling ideally should happen after
Degamma. In intel's case it is after the CSC.

Regards,
Uma Shankar

> Harry
> 
> > +Proposal is to have below properties for a plane:
> > +
> > +* Plane Degamma or Pre-Curve:
> > +	* This will be used to linearize the input framebuffer data.
> > +	* It will apply the reverse of the color transfer function.
> > +	* It can be a degamma curve or OETF for HDR.
> > +	* This linear data can be further acted on by the following
> > +	* color hardware blocks in the display hardware pipeline
> > +
> > +UAPI Name: PLANE_DEGAMMA_MODE
> > +Description: Enum property with values as blob_id's which advertizes the
> > +	    possible degamma modes and lut ranges supported by the platform.
> > +	    This  allows userspace to query and get the plane degamma color
> > +	    caps and choose the appropriate degamma mode and create lut values
> > +	    accordingly.
> > +
> > +UAPI Name: PLANE_DEGAMMA_LUT
> > +Description: Blob property which allows a userspace to provide LUT values
> > +	     to apply degamma curve using the h/w plane degamma processing
> > +	     engine, thereby making the content as linear for further color
> > +	     processing. Userspace gets the size of LUT and precision etc
> > +	     from PLANE_DEGAMA_MODE_PROPERTY
> > +
> > +* Plane CTM
> > +	* This is a Property to program the color transformation matrix.
> > +	* This can be used to perform a color space conversion like
> > +	* BT2020 to BT709 or BT601 etc.
> > +	* This block is generally kept after the degamma unit so that
> > +	* linear data can be fed to it for conversion.
> > +
> > +UAPI Name: PLANE_CTM
> > +Description: Blob property which allows a userspace to provide CTM coefficients
> > +	     to do color space conversion or any other enhancement by doing a
> > +	     matrix multiplication using the h/w CTM processing engine
> > +
> > +* Plane Gamma or Post-Curve
> > +	* This can be used to perform 2 operations:
> > +		* non-lineralize the framebuffer data. Can be used for
> > +		* non linear blending. It can be a gamma curve or EOTF
> > +		* for HDR.
> > +		* Perform Tone Mapping operation. This is an operation
> > +		* done when blending is done with HDR and SDR content.
> > +
> > +UAPI Name: PLANE_GAMMA_MODE
> > +Description: Enum property with values as blob_id's which advertizes the
> > +	    possible gamma modes and lut ranges supported by the platform.
> > +	    This  allows userspace to query and get the plane gamma color
> > +	    caps and choose the appropriate gamma mode and create lut values
> > +	    accordingly.
> > +
> > +UAPI Name: PLANE_GAMMA_LUT
> > +Description: Blob property which allows a userspace to provide LUT values
> > +	     to apply gamma curve or perform tone mapping using the h/w plane
> > +	     gamma processing engine, thereby making the content as linear
> > +	     for further color processing. Userspace gets the size of LUT and
> > +	     precision etc from PLANE_GAMA_MODE_PROPERTY
> > +
> > +This is part of one plane engine. Data from multiple planes will be
> > +then fed to pipe where it will get blended. There is a similar set of
> > +properties available at crtc level which acts on this blended data.
> > +
> > +Below is a sample usecase:
> > +
> > +  ┌────────────┐      ┌─────────────┐     ┌─────────────┐
> ┌─────────────┐
> > +  │FB1         │      │Degamma Block│     │ CTM Matrix  │     │ Gamma Block │
> > +  │            ├─────►│Linearize-   ├────►│ BT709 to    ├────►│ SDR to HDR  │
> > +  │BT709 SDR   │      │BT709 inverse│     │ BT2020      │     │ Tone
> Mapping├────────┐
> > +  └────────────┘      └─────────────┘     └─────────────┘
> └─────────────┘        │
> > +                                                                                     │
> > +  ┌────────────┐      ┌─────────────┐     ┌─────────────┐
> ┌─────────────┐        │
> > +  │FB2         │      │Degamma Block│     │ CTM Matrix  │     │ Gamma Block │        │
> > +  │            ├─────►│Linearize-   ├────►│ BT601 to    ├────►│ SDR to HDR
> ├─────┐  │
> > +  │BT601 SDR   │      │BT601 inverse│     │ BT2020      │     │ Tone Mapping│     │  │
> > +  └────────────┘      └─────────────┘     └─────────────┘
> └─────────────┘     │  │
> > +                                                                                  │  │
> > +  ┌────────────┐      ┌─────────────┐     ┌─────────────┐
> ┌─────────────┐     │  │
> > +  │FB3         │      │Degamma Block│     │ CTM Matrix  │     │ Gamma Block │     │  │
> > +  │            ├─────►│Linearize-   ├────►│ NOP (Data in├────►│ NOP (Data
> in├───┐ │  │
> > +  │BT2020 HDR  │      │HDR OETF     │     │ BT2020)     │     │ HDR)        │   │ │  │
> > +  └────────────┘      └─────────────┘     └─────────────┘
> └─────────────┘   │ │  │
> > +                                                                                │ │  │
> > +                                                                                │ │  │
> > +
> > +│ │  │
> >
> +┌──────────────────────────────────────────────────────────────────
> ──
> > +───────────┴─┴──┘
> > +│
> > +│ ┌─────────────┐      ┌─────────────┐      ┌───────────────┐
> > +│ │ CRTC Degamma│      │ CRTC CTM    │      │ CRTC Gamma    │
> > +└─┤ Use to make ├─────►│ Use for any ├─────►│ Use for Tone  ├─────►
> TO Port
> > +  │ data linear │      │ Color Space │      │ Mapping/apply │
> > +  │ after blend │      │ Conversion  │      │ transfer func │
> > +  └─────────────┘      └─────────────┘      └───────────────┘
> > +
> > +
> > +This patch series adds properties for plane color features. It adds
> > +properties for degamma used to linearize data and CSC used for gamut
> > +conversion. It also includes Gamma support used to again
> > +non-linearize data as per panel supported color space. These can be
> > +utilize by user space to convert planes from one format to another,
> > +one color space to another etc.
> > +
> > +Userspace can take smart blending decisions and utilize these
> > +hardware supported plane color features to get accurate color
> > +profile. The same can help in consistent color quality from source to
> > +panel taking advantage of advanced color features in hardware.
> > +
> > +These patches add the property interfaces and enable helper functions.
> > +This series adds Intel's XE_LPD hw specific plane gamma feature. We
> > +can build up and add other platform/hardware specific implementation
> > +on top of this series.
> > +
> > +Credits: Special mention and credits to Ville Syrjala for coming up
> > +with a design for this feature and inputs. This series is based on
> > +his original design and idea.
> >


  reply	other threads:[~2021-11-25 20:43 UTC|newest]

Thread overview: 154+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-06 21:38 [Intel-gfx] [RFC v2 00/22] Add Support for Plane Color Lut and CSC features Uma Shankar
2021-09-06 21:38 ` Uma Shankar
2021-09-06 21:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add Support for Plane Color Lut and CSC features (rev2) Patchwork
2021-09-06 21:30 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-10-12 10:30   ` Pekka Paalanen
2021-10-12 10:30     ` [Intel-gfx] " Pekka Paalanen
2021-10-12 10:35     ` Simon Ser
2021-10-12 10:35       ` [Intel-gfx] " Simon Ser
2021-10-12 12:00       ` Pekka Paalanen
2021-10-12 12:00         ` [Intel-gfx] " Pekka Paalanen
2021-10-12 19:11         ` Shankar, Uma
2021-10-12 19:11           ` [Intel-gfx] " Shankar, Uma
2021-10-13  7:25           ` Pekka Paalanen
2021-10-13  7:25             ` [Intel-gfx] " Pekka Paalanen
2021-10-14 19:46             ` Shankar, Uma
2021-10-14 19:46               ` [Intel-gfx] " Shankar, Uma
2021-10-12 20:58     ` Shankar, Uma
2021-10-12 20:58       ` [Intel-gfx] " Shankar, Uma
2021-10-13  8:30       ` Pekka Paalanen
2021-10-13  8:30         ` [Intel-gfx] " Pekka Paalanen
2021-10-14 19:44         ` Shankar, Uma
2021-10-14 19:44           ` [Intel-gfx] " Shankar, Uma
2021-10-15  7:42           ` Pekka Paalanen
2021-10-15  7:42             ` [Intel-gfx] " Pekka Paalanen
2021-10-26 15:11             ` Harry Wentland
2021-10-26 15:11               ` [Intel-gfx] " Harry Wentland
2021-10-26 15:36           ` Harry Wentland
2021-10-26 15:36             ` [Intel-gfx] " Harry Wentland
2021-10-27  8:00             ` Pekka Paalanen
2021-10-27  8:00               ` [Intel-gfx] " Pekka Paalanen
2021-10-27 12:48               ` Harry Wentland
2021-10-27 12:48                 ` Harry Wentland
2021-10-26 15:40       ` Harry Wentland
2021-10-26 15:40         ` [Intel-gfx] " Harry Wentland
2021-11-23 15:05   ` Harry Wentland
2021-11-23 15:05     ` [Intel-gfx] " Harry Wentland
2021-11-25 20:43     ` Shankar, Uma [this message]
2021-11-25 20:43       ` Shankar, Uma
2021-11-26  8:21       ` Pekka Paalanen
2021-11-26  8:21         ` [Intel-gfx] " Pekka Paalanen
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 02/22] drm: Add Enhanced Gamma and color lut range attributes Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-11-03 15:08   ` Harry Wentland
2021-11-03 15:08     ` [Intel-gfx] " Harry Wentland
2021-11-04  8:38     ` Pekka Paalanen
2021-11-04  8:38       ` [Intel-gfx] " Pekka Paalanen
2021-11-04 16:27       ` Harry Wentland
2021-11-04 16:27         ` [Intel-gfx] " Harry Wentland
2021-11-05 11:49         ` Ville Syrjälä
2021-11-05 11:49           ` [Intel-gfx] " Ville Syrjälä
2021-11-09 20:22           ` Harry Wentland
2021-11-09 20:22             ` [Intel-gfx] " Harry Wentland
2021-11-08  9:54         ` Pekka Paalanen
2021-11-08  9:54           ` [Intel-gfx] " Pekka Paalanen
2021-11-09 20:47           ` Harry Wentland
2021-11-09 20:47             ` [Intel-gfx] " Harry Wentland
2021-11-09 22:02             ` Ville Syrjälä
2021-11-09 22:02               ` [Intel-gfx] " Ville Syrjälä
2021-11-10  8:49               ` Pekka Paalanen
2021-11-10  8:49                 ` [Intel-gfx] " Pekka Paalanen
2021-11-10 11:55                 ` Ville Syrjälä
2021-11-10 11:55                   ` [Intel-gfx] " Ville Syrjälä
2021-11-10 15:17                   ` Harry Wentland
2021-11-10 15:17                     ` [Intel-gfx] " Harry Wentland
2021-11-11  8:22                     ` Pekka Paalanen
2021-11-11  8:22                       ` [Intel-gfx] " Pekka Paalanen
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 03/22] drm: Add Plane Degamma Mode property Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-10-12 11:50   ` Pekka Paalanen
2021-10-12 11:50     ` [Intel-gfx] " Pekka Paalanen
2021-10-12 21:02     ` Shankar, Uma
2021-10-12 21:02       ` [Intel-gfx] " Shankar, Uma
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 04/22] drm: Add Plane Degamma Lut property Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 05/22] drm/i915/xelpd: Define Degamma Lut range struct for HDR planes Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-11-03 15:10   ` Harry Wentland
2021-11-03 15:10     ` [Intel-gfx] " Harry Wentland
2021-11-05 12:59     ` Ville Syrjälä
2021-11-05 12:59       ` [Intel-gfx] " Ville Syrjälä
2021-11-09 20:19       ` Harry Wentland
2021-11-09 20:19         ` [Intel-gfx] " Harry Wentland
2021-11-09 21:45         ` Ville Syrjälä
2021-11-09 21:45           ` [Intel-gfx] " Ville Syrjälä
2021-11-09 21:56           ` Harry Wentland
2021-11-09 21:56             ` [Intel-gfx] " Harry Wentland
2021-11-11 15:17   ` Harry Wentland
2021-11-11 15:17     ` [Intel-gfx] " Harry Wentland
2021-11-11 16:42     ` Ville Syrjälä
2021-11-11 16:42       ` [Intel-gfx] " Ville Syrjälä
2021-11-11 20:42       ` Shankar, Uma
2021-11-11 20:42         ` [Intel-gfx] " Shankar, Uma
2021-11-11 21:10         ` Harry Wentland
2021-11-11 21:10           ` [Intel-gfx] " Harry Wentland
2021-11-11 21:58           ` Shankar, Uma
2021-11-11 21:58             ` [Intel-gfx] " Shankar, Uma
2021-11-12  8:37             ` Pekka Paalanen
2021-11-12  8:37               ` [Intel-gfx] " Pekka Paalanen
2021-11-23 14:40               ` Harry Wentland
2021-11-23 14:40                 ` [Intel-gfx] " Harry Wentland
2021-11-12 14:54           ` Ville Syrjälä
2021-11-12 14:54             ` [Intel-gfx] " Ville Syrjälä
2021-11-16  8:15             ` Pekka Paalanen
2021-11-16  8:15               ` [Intel-gfx] " Pekka Paalanen
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 06/22] drm/i915/xelpd: Add register definitions for Plane Degamma Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 07/22] drm/i915/xelpd: Enable plane color features Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 08/22] drm/i915/xelpd: Add color capabilities of SDR planes Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 09/22] drm/i915/xelpd: Program Plane Degamma Registers Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 10/22] drm/i915/xelpd: Add plane color check to glk_plane_color_ctl Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 11/22] drm/i915/xelpd: Initialize plane color features Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [RFC v2 12/22] drm/i915/xelpd: Load plane color luts from atomic flip Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 13/22] drm: Add Plane CTM property Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 14/22] drm: Add helper to attach Plane ctm property Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 15/22] drm/i915/xelpd: Define Plane CSC Registers Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 16/22] drm/i915/xelpd: Enable Plane CSC Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 17/22] drm: Add Plane Gamma Mode property Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 18/22] drm: Add Plane Gamma Lut property Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 19/22] drm/i915/xelpd: Define and Initialize Plane Gamma Lut range Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 20/22] drm/i915/xelpd: Add register definitions for Plane Gamma Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 21/22] drm/i915/xelpd: Program Plane Gamma Registers Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 22/22] drm/i915/xelpd: Enable plane gamma Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add Support for Plane Color Lut and CSC features (rev2) Patchwork
2021-09-06 23:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-12 11:55 ` [RFC v2 00/22] Add Support for Plane Color Lut and CSC features Pekka Paalanen
2021-10-12 11:55   ` [Intel-gfx] " Pekka Paalanen
2021-10-12 21:01   ` Shankar, Uma
2021-10-12 21:01     ` [Intel-gfx] " Shankar, Uma
2021-10-26 15:02     ` Harry Wentland
2021-10-26 15:02       ` [Intel-gfx] " Harry Wentland
2021-10-27  8:18       ` Pekka Paalanen
2021-10-27  8:18         ` [Intel-gfx] " Pekka Paalanen
2022-02-02 16:11 ` Harry Wentland
2022-02-02 16:11   ` [Intel-gfx] " Harry Wentland
2022-02-03 17:22   ` Shankar, Uma
2022-02-03 17:22     ` [Intel-gfx] " Shankar, Uma

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