All of lore.kernel.org
 help / color / mirror / Atom feed
From: Pekka Paalanen <ppaalanen@gmail.com>
To: Harry Wentland <harry.wentland@amd.com>
Cc: "Shankar, Uma" <uma.shankar@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"brian.starkey@arm.com" <brian.starkey@arm.com>,
	"sebastian@sebastianwick.net" <sebastian@sebastianwick.net>,
	"Shashank.Sharma@amd.com" <Shashank.Sharma@amd.com>,
	"Cyr, Aric" <Aric.Cyr@amd.com>,
	Vitaly Prosyak <Vitaly.Prosyak@amd.com>
Subject: Re: [RFC v2 00/22] Add Support for Plane Color Lut and CSC features
Date: Wed, 27 Oct 2021 11:18:46 +0300	[thread overview]
Message-ID: <20211027111846.600efd79@eldfell> (raw)
In-Reply-To: <24c8bf32-2eea-8f32-33b1-0628701c22bd@amd.com>

[-- Attachment #1: Type: text/plain, Size: 9704 bytes --]

On Tue, 26 Oct 2021 11:02:31 -0400
Harry Wentland <harry.wentland@amd.com> wrote:

> On 2021-10-12 17:01, Shankar, Uma wrote:
> > 
> >   
> >> -----Original Message-----
> >> From: Pekka Paalanen <ppaalanen@gmail.com>
> >> Sent: Tuesday, October 12, 2021 5:25 PM
> >> To: Shankar, Uma <uma.shankar@intel.com>
> >> Cc: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> >> harry.wentland@amd.com; ville.syrjala@linux.intel.com; brian.starkey@arm.com;
> >> sebastian@sebastianwick.net; Shashank.Sharma@amd.com
> >> Subject: Re: [RFC v2 00/22] Add Support for Plane Color Lut and CSC features
> >>
> >> On Tue,  7 Sep 2021 03:08:42 +0530
> >> Uma Shankar <uma.shankar@intel.com> wrote:
> >>  
> >>> This is how a typical display color hardware pipeline looks like:
> >>>  +-------------------------------------------+
> >>>  |                RAM                        |
> >>>  |  +------+    +---------+    +---------+   |
> >>>  |  | FB 1 |    |  FB 2   |    | FB N    |   |
> >>>  |  +------+    +---------+    +---------+   |
> >>>  +-------------------------------------------+
> >>>        |  Plane Color Hardware Block |
> >>> +--------------------------------------------+
> >>>  | +---v-----+   +---v-------+   +---v------+ |
> >>>  | | Plane A |   | Plane B   |   | Plane N  | |
> >>>  | | DeGamma |   | Degamma   |   | Degamma  | |
> >>>  | +---+-----+   +---+-------+   +---+------+ |
> >>>  |     |             |               |        |
> >>>  | +---v-----+   +---v-------+   +---v------+ |
> >>>  | |Plane A  |   | Plane B   |   | Plane N  | |
> >>>  | |CSC/CTM  |   | CSC/CTM   |   | CSC/CTM  | |
> >>>  | +---+-----+   +----+------+   +----+-----+ |
> >>>  |     |              |               |       |
> >>>  | +---v-----+   +----v------+   +----v-----+ |
> >>>  | | Plane A |   | Plane B   |   | Plane N  | |
> >>>  | | Gamma   |   | Gamma     |   | Gamma    | |
> >>>  | +---+-----+   +----+------+   +----+-----+ |
> >>>  |     |              |               |       |
> >>>  +--------------------------------------------+
> >>> +------v--------------v---------------v-------|
> >>> ||                                           ||
> >>> ||           Pipe Blender                    ||
> >>> +--------------------+------------------------+
> >>> |                    |                        |
> >>> |        +-----------v----------+             |
> >>> |        |  Pipe DeGamma        |             |
> >>> |        |                      |             |
> >>> |        +-----------+----------+             |
> >>> |                    |            Pipe Color  |
> >>> |        +-----------v----------+ Hardware    |
> >>> |        |  Pipe CSC/CTM        |             |
> >>> |        |                      |             |
> >>> |        +-----------+----------+             |
> >>> |                    |                        |
> >>> |        +-----------v----------+             |
> >>> |        |  Pipe Gamma          |             |
> >>> |        |                      |             |
> >>> |        +-----------+----------+             |
> >>> |                    |                        |
> >>> +---------------------------------------------+
> >>>                      |
> >>>                      v
> >>>                Pipe Output
> >>>
> >>> This patch series adds properties for plane color features. It adds
> >>> properties for degamma used to linearize data and CSC used for gamut
> >>> conversion. It also includes Gamma support used to again non-linearize
> >>> data as per panel supported color space. These can be utilize by user
> >>> space to convert planes from one format to another, one color space to
> >>> another etc.
> >>>
> >>> Userspace can take smart blending decisions and utilize these hardware
> >>> supported plane color features to get accurate color profile. The same
> >>> can help in consistent color quality from source to panel taking
> >>> advantage of advanced color features in hardware.
> >>>
> >>> These patches add the property interfaces and enable helper functions.
> >>> This series adds Intel's XE_LPD hw specific plane gamma feature. We
> >>> can build up and add other platform/hardware specific implementation
> >>> on top of this series.
> >>>
> >>> Credits: Special mention and credits to Ville Syrjala for coming up
> >>> with a design for this feature and inputs. This series is based on his
> >>> original design and idea.
> >>>
> >>> Note: Userspace support for this new UAPI will be done on Chrome in
> >>> alignment with weston and general opensource community.
> >>> Discussion ongoing with Harry Wentland, Pekka and community on color
> >>> pipeline and UAPI design. Harry's RFC below:  
> >>> https://patchwork.freedesktop.org/series/89506/>>>> We need to converge on a common UAPI interface which caters to all the  
> >>> modern color hardware pipelines.
> >>>
> >>> ToDo: State readout for this feature will be added next.
> >>>
> >>> v2: Added UAPI description and added change in the rfc section of
> >>> kernel Documentation folder  
> >>
> >> Hi,
> >>
> >> thank you for this. I do believe the KMS UAPI should expose what hardware can do
> >> (prescribed operations) rather than how they would be often used (to realize a
> >> conversion from one space description to another). This proposal fits quite nicely
> >> with what I have envisioned for Weston.  
> >   
> 
> It's taken me a while but I am starting to agree with the prescriptive approach to
> expose HW functionality. One thing we'll want to be careful of is to make sure
> this isn't tied to specific HW more than it needs to be. I'll comment in other
> places of this patchset to elaborate.
> 
> What's making me come around, i.e. change from a prescriptive (these are the
> input/output/blending spaces/formats) to a descriptive (these are the LUTs and
> CTMs) approach?
> 
> 1) The prescriptive way has no good way of dealing with gamut and tone mapping.
>    To do so we would need explicit OOTFs and CTMs or 3D LUTs anyways.
> 
> 2) The prescriptive way provides no semblance of guarantee that transforms
>    are equivalent when the compositor uses shaders transforms and composition
>    vs when the compositor uses KMS transforms and composition.
> 
> 3) Policy about treatment of surfaces/planes and blending is best left with
>    the compositor (for the above reasons).

Hi Harry,

I think we might have confusion there about prescriptive vs.
descriptive, but I understand what you mean, and yes, those are my
points too.

> >> I mainly went over the big picture by commenting in detail on the proposal
> >> document, and not looking too carefully at the other documentation or UAPI details
> >> at this time.  
> > 
> > Thanks Pekka for the feedback.
> >   
> >> Unfortunately I was unable to decipher how userspace is supposed to use the
> >> XE_LPD special gamma features.  
> > 
> > I will include the details on how userspace should actually get this through a sample
> > IGT reference, that should help make this clear.
> >   
> 
> It looks like with your current definitions each userspace compositor (Weston, kwin,
> mutter, wlroots, Chrome's compositor, Android's compositor, etc.) would need to learn
> how to program the XE_LPD LUTs as well as AMD LUTs. Would these definitions change
> in future Intel HW generations? Would this mean all compositors would need to learn
> again how to program the future LUT format?
> 
> Other options would be to give userspace a generic LUT with 4k FP16 entries and then
> re-map that to the HW LUT in the kernel driver.

Do you want to run the optimisation algorithm to map the generic LUT to
hardware specific optimised representation in the kernel driver?
Wouldn't that be too much?

To me this seems like the perfect starting point for a libcamera
equivalent to KMS. Feed the generic LUT to the lib, and get whatever
the hardware-driver-specific KMS UAPI needs. Perhaps even with an error
measure, so that a compositor can evaluate whether the mapping is
accurate enough or if it needs to fall back.

> I might be missing some of the nuances of the XE_LPD LUT but it seems to me that the
> main difference between different PWL implementations is the distribution of the
> points used to define the LUT. Maybe a more generic PWL implementation could have
> a kernel driver report one (or more) PWL point distributions. We could encode these
> as enums and pre-defined arrays in a UAPI header. That way the compositor could have
> a single, generic implementation of programming PWL in FP16 and the kernel driver
> would only need to remap the FP16 to the HW-internal format, which is a trivial
> conversion. Using this approach compositors would implement PWL support once and won't
> have to touch it again in the future. Is there anything that would make this approach
> a bad idea for Intel HW (or other HW)? (Credit for this idea goes to Vitaly)

I think that is also a workable solution. If that happens, it seems
likely that a library for that optimisation will appear.

It has just one shortcoming: the compositor has no idea of the
precision as there is no way to get an error measure for how much the
FP16->internal conversion loses precision.

But maybe that is never significant? Or could we have some precision
guarantees otherwise?

I'm thinking of hard-core professional color users who wouldn't
normally trust off-loading to KMS at all, at least not on-demand
off-loading where you are never sure if you are looking at SW or KMS
composition.


Thanks,
pq

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

WARNING: multiple messages have this Message-ID (diff)
From: Pekka Paalanen <ppaalanen@gmail.com>
To: Harry Wentland <harry.wentland@amd.com>
Cc: "Shankar, Uma" <uma.shankar@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"brian.starkey@arm.com" <brian.starkey@arm.com>,
	"sebastian@sebastianwick.net" <sebastian@sebastianwick.net>,
	"Shashank.Sharma@amd.com" <Shashank.Sharma@amd.com>,
	"Cyr, Aric" <Aric.Cyr@amd.com>,
	Vitaly Prosyak <Vitaly.Prosyak@amd.com>
Subject: Re: [Intel-gfx] [RFC v2 00/22] Add Support for Plane Color Lut and CSC features
Date: Wed, 27 Oct 2021 11:18:46 +0300	[thread overview]
Message-ID: <20211027111846.600efd79@eldfell> (raw)
In-Reply-To: <24c8bf32-2eea-8f32-33b1-0628701c22bd@amd.com>

[-- Attachment #1: Type: text/plain, Size: 9704 bytes --]

On Tue, 26 Oct 2021 11:02:31 -0400
Harry Wentland <harry.wentland@amd.com> wrote:

> On 2021-10-12 17:01, Shankar, Uma wrote:
> > 
> >   
> >> -----Original Message-----
> >> From: Pekka Paalanen <ppaalanen@gmail.com>
> >> Sent: Tuesday, October 12, 2021 5:25 PM
> >> To: Shankar, Uma <uma.shankar@intel.com>
> >> Cc: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> >> harry.wentland@amd.com; ville.syrjala@linux.intel.com; brian.starkey@arm.com;
> >> sebastian@sebastianwick.net; Shashank.Sharma@amd.com
> >> Subject: Re: [RFC v2 00/22] Add Support for Plane Color Lut and CSC features
> >>
> >> On Tue,  7 Sep 2021 03:08:42 +0530
> >> Uma Shankar <uma.shankar@intel.com> wrote:
> >>  
> >>> This is how a typical display color hardware pipeline looks like:
> >>>  +-------------------------------------------+
> >>>  |                RAM                        |
> >>>  |  +------+    +---------+    +---------+   |
> >>>  |  | FB 1 |    |  FB 2   |    | FB N    |   |
> >>>  |  +------+    +---------+    +---------+   |
> >>>  +-------------------------------------------+
> >>>        |  Plane Color Hardware Block |
> >>> +--------------------------------------------+
> >>>  | +---v-----+   +---v-------+   +---v------+ |
> >>>  | | Plane A |   | Plane B   |   | Plane N  | |
> >>>  | | DeGamma |   | Degamma   |   | Degamma  | |
> >>>  | +---+-----+   +---+-------+   +---+------+ |
> >>>  |     |             |               |        |
> >>>  | +---v-----+   +---v-------+   +---v------+ |
> >>>  | |Plane A  |   | Plane B   |   | Plane N  | |
> >>>  | |CSC/CTM  |   | CSC/CTM   |   | CSC/CTM  | |
> >>>  | +---+-----+   +----+------+   +----+-----+ |
> >>>  |     |              |               |       |
> >>>  | +---v-----+   +----v------+   +----v-----+ |
> >>>  | | Plane A |   | Plane B   |   | Plane N  | |
> >>>  | | Gamma   |   | Gamma     |   | Gamma    | |
> >>>  | +---+-----+   +----+------+   +----+-----+ |
> >>>  |     |              |               |       |
> >>>  +--------------------------------------------+
> >>> +------v--------------v---------------v-------|
> >>> ||                                           ||
> >>> ||           Pipe Blender                    ||
> >>> +--------------------+------------------------+
> >>> |                    |                        |
> >>> |        +-----------v----------+             |
> >>> |        |  Pipe DeGamma        |             |
> >>> |        |                      |             |
> >>> |        +-----------+----------+             |
> >>> |                    |            Pipe Color  |
> >>> |        +-----------v----------+ Hardware    |
> >>> |        |  Pipe CSC/CTM        |             |
> >>> |        |                      |             |
> >>> |        +-----------+----------+             |
> >>> |                    |                        |
> >>> |        +-----------v----------+             |
> >>> |        |  Pipe Gamma          |             |
> >>> |        |                      |             |
> >>> |        +-----------+----------+             |
> >>> |                    |                        |
> >>> +---------------------------------------------+
> >>>                      |
> >>>                      v
> >>>                Pipe Output
> >>>
> >>> This patch series adds properties for plane color features. It adds
> >>> properties for degamma used to linearize data and CSC used for gamut
> >>> conversion. It also includes Gamma support used to again non-linearize
> >>> data as per panel supported color space. These can be utilize by user
> >>> space to convert planes from one format to another, one color space to
> >>> another etc.
> >>>
> >>> Userspace can take smart blending decisions and utilize these hardware
> >>> supported plane color features to get accurate color profile. The same
> >>> can help in consistent color quality from source to panel taking
> >>> advantage of advanced color features in hardware.
> >>>
> >>> These patches add the property interfaces and enable helper functions.
> >>> This series adds Intel's XE_LPD hw specific plane gamma feature. We
> >>> can build up and add other platform/hardware specific implementation
> >>> on top of this series.
> >>>
> >>> Credits: Special mention and credits to Ville Syrjala for coming up
> >>> with a design for this feature and inputs. This series is based on his
> >>> original design and idea.
> >>>
> >>> Note: Userspace support for this new UAPI will be done on Chrome in
> >>> alignment with weston and general opensource community.
> >>> Discussion ongoing with Harry Wentland, Pekka and community on color
> >>> pipeline and UAPI design. Harry's RFC below:  
> >>> https://patchwork.freedesktop.org/series/89506/>>>> We need to converge on a common UAPI interface which caters to all the  
> >>> modern color hardware pipelines.
> >>>
> >>> ToDo: State readout for this feature will be added next.
> >>>
> >>> v2: Added UAPI description and added change in the rfc section of
> >>> kernel Documentation folder  
> >>
> >> Hi,
> >>
> >> thank you for this. I do believe the KMS UAPI should expose what hardware can do
> >> (prescribed operations) rather than how they would be often used (to realize a
> >> conversion from one space description to another). This proposal fits quite nicely
> >> with what I have envisioned for Weston.  
> >   
> 
> It's taken me a while but I am starting to agree with the prescriptive approach to
> expose HW functionality. One thing we'll want to be careful of is to make sure
> this isn't tied to specific HW more than it needs to be. I'll comment in other
> places of this patchset to elaborate.
> 
> What's making me come around, i.e. change from a prescriptive (these are the
> input/output/blending spaces/formats) to a descriptive (these are the LUTs and
> CTMs) approach?
> 
> 1) The prescriptive way has no good way of dealing with gamut and tone mapping.
>    To do so we would need explicit OOTFs and CTMs or 3D LUTs anyways.
> 
> 2) The prescriptive way provides no semblance of guarantee that transforms
>    are equivalent when the compositor uses shaders transforms and composition
>    vs when the compositor uses KMS transforms and composition.
> 
> 3) Policy about treatment of surfaces/planes and blending is best left with
>    the compositor (for the above reasons).

Hi Harry,

I think we might have confusion there about prescriptive vs.
descriptive, but I understand what you mean, and yes, those are my
points too.

> >> I mainly went over the big picture by commenting in detail on the proposal
> >> document, and not looking too carefully at the other documentation or UAPI details
> >> at this time.  
> > 
> > Thanks Pekka for the feedback.
> >   
> >> Unfortunately I was unable to decipher how userspace is supposed to use the
> >> XE_LPD special gamma features.  
> > 
> > I will include the details on how userspace should actually get this through a sample
> > IGT reference, that should help make this clear.
> >   
> 
> It looks like with your current definitions each userspace compositor (Weston, kwin,
> mutter, wlroots, Chrome's compositor, Android's compositor, etc.) would need to learn
> how to program the XE_LPD LUTs as well as AMD LUTs. Would these definitions change
> in future Intel HW generations? Would this mean all compositors would need to learn
> again how to program the future LUT format?
> 
> Other options would be to give userspace a generic LUT with 4k FP16 entries and then
> re-map that to the HW LUT in the kernel driver.

Do you want to run the optimisation algorithm to map the generic LUT to
hardware specific optimised representation in the kernel driver?
Wouldn't that be too much?

To me this seems like the perfect starting point for a libcamera
equivalent to KMS. Feed the generic LUT to the lib, and get whatever
the hardware-driver-specific KMS UAPI needs. Perhaps even with an error
measure, so that a compositor can evaluate whether the mapping is
accurate enough or if it needs to fall back.

> I might be missing some of the nuances of the XE_LPD LUT but it seems to me that the
> main difference between different PWL implementations is the distribution of the
> points used to define the LUT. Maybe a more generic PWL implementation could have
> a kernel driver report one (or more) PWL point distributions. We could encode these
> as enums and pre-defined arrays in a UAPI header. That way the compositor could have
> a single, generic implementation of programming PWL in FP16 and the kernel driver
> would only need to remap the FP16 to the HW-internal format, which is a trivial
> conversion. Using this approach compositors would implement PWL support once and won't
> have to touch it again in the future. Is there anything that would make this approach
> a bad idea for Intel HW (or other HW)? (Credit for this idea goes to Vitaly)

I think that is also a workable solution. If that happens, it seems
likely that a library for that optimisation will appear.

It has just one shortcoming: the compositor has no idea of the
precision as there is no way to get an error measure for how much the
FP16->internal conversion loses precision.

But maybe that is never significant? Or could we have some precision
guarantees otherwise?

I'm thinking of hard-core professional color users who wouldn't
normally trust off-loading to KMS at all, at least not on-demand
off-loading where you are never sure if you are looking at SW or KMS
composition.


Thanks,
pq

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

  reply	other threads:[~2021-10-27  8:18 UTC|newest]

Thread overview: 154+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-06 21:38 [Intel-gfx] [RFC v2 00/22] Add Support for Plane Color Lut and CSC features Uma Shankar
2021-09-06 21:38 ` Uma Shankar
2021-09-06 21:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add Support for Plane Color Lut and CSC features (rev2) Patchwork
2021-09-06 21:30 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-10-12 10:30   ` Pekka Paalanen
2021-10-12 10:30     ` [Intel-gfx] " Pekka Paalanen
2021-10-12 10:35     ` Simon Ser
2021-10-12 10:35       ` [Intel-gfx] " Simon Ser
2021-10-12 12:00       ` Pekka Paalanen
2021-10-12 12:00         ` [Intel-gfx] " Pekka Paalanen
2021-10-12 19:11         ` Shankar, Uma
2021-10-12 19:11           ` [Intel-gfx] " Shankar, Uma
2021-10-13  7:25           ` Pekka Paalanen
2021-10-13  7:25             ` [Intel-gfx] " Pekka Paalanen
2021-10-14 19:46             ` Shankar, Uma
2021-10-14 19:46               ` [Intel-gfx] " Shankar, Uma
2021-10-12 20:58     ` Shankar, Uma
2021-10-12 20:58       ` [Intel-gfx] " Shankar, Uma
2021-10-13  8:30       ` Pekka Paalanen
2021-10-13  8:30         ` [Intel-gfx] " Pekka Paalanen
2021-10-14 19:44         ` Shankar, Uma
2021-10-14 19:44           ` [Intel-gfx] " Shankar, Uma
2021-10-15  7:42           ` Pekka Paalanen
2021-10-15  7:42             ` [Intel-gfx] " Pekka Paalanen
2021-10-26 15:11             ` Harry Wentland
2021-10-26 15:11               ` [Intel-gfx] " Harry Wentland
2021-10-26 15:36           ` Harry Wentland
2021-10-26 15:36             ` [Intel-gfx] " Harry Wentland
2021-10-27  8:00             ` Pekka Paalanen
2021-10-27  8:00               ` [Intel-gfx] " Pekka Paalanen
2021-10-27 12:48               ` Harry Wentland
2021-10-27 12:48                 ` Harry Wentland
2021-10-26 15:40       ` Harry Wentland
2021-10-26 15:40         ` [Intel-gfx] " Harry Wentland
2021-11-23 15:05   ` Harry Wentland
2021-11-23 15:05     ` [Intel-gfx] " Harry Wentland
2021-11-25 20:43     ` Shankar, Uma
2021-11-25 20:43       ` [Intel-gfx] " Shankar, Uma
2021-11-26  8:21       ` Pekka Paalanen
2021-11-26  8:21         ` [Intel-gfx] " Pekka Paalanen
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 02/22] drm: Add Enhanced Gamma and color lut range attributes Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-11-03 15:08   ` Harry Wentland
2021-11-03 15:08     ` [Intel-gfx] " Harry Wentland
2021-11-04  8:38     ` Pekka Paalanen
2021-11-04  8:38       ` [Intel-gfx] " Pekka Paalanen
2021-11-04 16:27       ` Harry Wentland
2021-11-04 16:27         ` [Intel-gfx] " Harry Wentland
2021-11-05 11:49         ` Ville Syrjälä
2021-11-05 11:49           ` [Intel-gfx] " Ville Syrjälä
2021-11-09 20:22           ` Harry Wentland
2021-11-09 20:22             ` [Intel-gfx] " Harry Wentland
2021-11-08  9:54         ` Pekka Paalanen
2021-11-08  9:54           ` [Intel-gfx] " Pekka Paalanen
2021-11-09 20:47           ` Harry Wentland
2021-11-09 20:47             ` [Intel-gfx] " Harry Wentland
2021-11-09 22:02             ` Ville Syrjälä
2021-11-09 22:02               ` [Intel-gfx] " Ville Syrjälä
2021-11-10  8:49               ` Pekka Paalanen
2021-11-10  8:49                 ` [Intel-gfx] " Pekka Paalanen
2021-11-10 11:55                 ` Ville Syrjälä
2021-11-10 11:55                   ` [Intel-gfx] " Ville Syrjälä
2021-11-10 15:17                   ` Harry Wentland
2021-11-10 15:17                     ` [Intel-gfx] " Harry Wentland
2021-11-11  8:22                     ` Pekka Paalanen
2021-11-11  8:22                       ` [Intel-gfx] " Pekka Paalanen
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 03/22] drm: Add Plane Degamma Mode property Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-10-12 11:50   ` Pekka Paalanen
2021-10-12 11:50     ` [Intel-gfx] " Pekka Paalanen
2021-10-12 21:02     ` Shankar, Uma
2021-10-12 21:02       ` [Intel-gfx] " Shankar, Uma
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 04/22] drm: Add Plane Degamma Lut property Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 05/22] drm/i915/xelpd: Define Degamma Lut range struct for HDR planes Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-11-03 15:10   ` Harry Wentland
2021-11-03 15:10     ` [Intel-gfx] " Harry Wentland
2021-11-05 12:59     ` Ville Syrjälä
2021-11-05 12:59       ` [Intel-gfx] " Ville Syrjälä
2021-11-09 20:19       ` Harry Wentland
2021-11-09 20:19         ` [Intel-gfx] " Harry Wentland
2021-11-09 21:45         ` Ville Syrjälä
2021-11-09 21:45           ` [Intel-gfx] " Ville Syrjälä
2021-11-09 21:56           ` Harry Wentland
2021-11-09 21:56             ` [Intel-gfx] " Harry Wentland
2021-11-11 15:17   ` Harry Wentland
2021-11-11 15:17     ` [Intel-gfx] " Harry Wentland
2021-11-11 16:42     ` Ville Syrjälä
2021-11-11 16:42       ` [Intel-gfx] " Ville Syrjälä
2021-11-11 20:42       ` Shankar, Uma
2021-11-11 20:42         ` [Intel-gfx] " Shankar, Uma
2021-11-11 21:10         ` Harry Wentland
2021-11-11 21:10           ` [Intel-gfx] " Harry Wentland
2021-11-11 21:58           ` Shankar, Uma
2021-11-11 21:58             ` [Intel-gfx] " Shankar, Uma
2021-11-12  8:37             ` Pekka Paalanen
2021-11-12  8:37               ` [Intel-gfx] " Pekka Paalanen
2021-11-23 14:40               ` Harry Wentland
2021-11-23 14:40                 ` [Intel-gfx] " Harry Wentland
2021-11-12 14:54           ` Ville Syrjälä
2021-11-12 14:54             ` [Intel-gfx] " Ville Syrjälä
2021-11-16  8:15             ` Pekka Paalanen
2021-11-16  8:15               ` [Intel-gfx] " Pekka Paalanen
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 06/22] drm/i915/xelpd: Add register definitions for Plane Degamma Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 07/22] drm/i915/xelpd: Enable plane color features Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 08/22] drm/i915/xelpd: Add color capabilities of SDR planes Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 09/22] drm/i915/xelpd: Program Plane Degamma Registers Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 10/22] drm/i915/xelpd: Add plane color check to glk_plane_color_ctl Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 11/22] drm/i915/xelpd: Initialize plane color features Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [RFC v2 12/22] drm/i915/xelpd: Load plane color luts from atomic flip Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 13/22] drm: Add Plane CTM property Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 14/22] drm: Add helper to attach Plane ctm property Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 15/22] drm/i915/xelpd: Define Plane CSC Registers Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 16/22] drm/i915/xelpd: Enable Plane CSC Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 17/22] drm: Add Plane Gamma Mode property Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 18/22] drm: Add Plane Gamma Lut property Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 19/22] drm/i915/xelpd: Define and Initialize Plane Gamma Lut range Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 20/22] drm/i915/xelpd: Add register definitions for Plane Gamma Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 21/22] drm/i915/xelpd: Program Plane Gamma Registers Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 22/22] drm/i915/xelpd: Enable plane gamma Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add Support for Plane Color Lut and CSC features (rev2) Patchwork
2021-09-06 23:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-12 11:55 ` [RFC v2 00/22] Add Support for Plane Color Lut and CSC features Pekka Paalanen
2021-10-12 11:55   ` [Intel-gfx] " Pekka Paalanen
2021-10-12 21:01   ` Shankar, Uma
2021-10-12 21:01     ` [Intel-gfx] " Shankar, Uma
2021-10-26 15:02     ` Harry Wentland
2021-10-26 15:02       ` [Intel-gfx] " Harry Wentland
2021-10-27  8:18       ` Pekka Paalanen [this message]
2021-10-27  8:18         ` Pekka Paalanen
2022-02-02 16:11 ` Harry Wentland
2022-02-02 16:11   ` [Intel-gfx] " Harry Wentland
2022-02-03 17:22   ` Shankar, Uma
2022-02-03 17:22     ` [Intel-gfx] " Shankar, Uma

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20211027111846.600efd79@eldfell \
    --to=ppaalanen@gmail.com \
    --cc=Aric.Cyr@amd.com \
    --cc=Shashank.Sharma@amd.com \
    --cc=Vitaly.Prosyak@amd.com \
    --cc=brian.starkey@arm.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=harry.wentland@amd.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=sebastian@sebastianwick.net \
    --cc=uma.shankar@intel.com \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.