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From: Harry Wentland <harry.wentland@amd.com>
To: Pekka Paalanen <ppaalanen@gmail.com>
Cc: "Shankar, Uma" <uma.shankar@intel.com>,
	"ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"brian.starkey@arm.com" <brian.starkey@arm.com>,
	"sebastian@sebastianwick.net" <sebastian@sebastianwick.net>,
	"Shashank.Sharma@amd.com" <Shashank.Sharma@amd.com>,
	"Cyr, Aric" <Aric.Cyr@amd.com>
Subject: Re: [Intel-gfx] [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
Date: Wed, 27 Oct 2021 08:48:13 -0400	[thread overview]
Message-ID: <a65548cd-2499-804a-895c-b1e723973f17@amd.com> (raw)
In-Reply-To: <20211027110057.72db81fa@eldfell>



On 2021-10-27 04:00, Pekka Paalanen wrote:
> On Tue, 26 Oct 2021 11:36:33 -0400
> Harry Wentland <harry.wentland@amd.com> wrote:
> 
>> On 2021-10-14 15:44, Shankar, Uma wrote:
>>>
> 

...

>> FWIW, AMD HW (depending on generation) can do these operations
>> (in this order):
>>
>> 1) 1D LUT (fixed or PWL programmable)
>> 2) simple multiplier (for scaling SDR content to HDR output)
>> 3) CTM matrix
>> 4) 1D LUT (shaper LUT to non-linearize for more effective 3D LUT transform)
>> 5) 3D LUT
>> 6) 1D LUT (for non-linear blending, or to linearize after 3D LUT)
>> 7) blending
>> 8) CTM matrix
>> 9) 1D LUT (shaper LUT like above)
>> 10) 3D LUT
>> 11) 1D LUT (generally for EOTF^-1 for display EOTF)
>>
>> Not all blocks are available on all (current and future) HW.
>>
>> I sketched a few diagrams that show how these might be used by
>> a compositor if we exposed all of these blocks and should
>> really try to add some of them to the color-and-hdr docs
>> repo.
> 
> Yes, please.
> 
> That pipeline looks pretty comprehensive.
> 
> Btw. how about YUV<->RGB conversion? Where would that matrix go? It
> needs to operate on non-linear values, while a color space conversion
> matrix needs to operate on linear color values.
> 

That is communicated via drm_framebuffer.format, and drm_plane's
color_range and color_encoding. I expect it to happen before
everything else, i.e. at step 0. It seems like any color management
implementation I've seen is always operating in RGB.

Harry

>>>>>>> +	* This can be used to perform a color space conversion like
>>>>>>> +	* BT2020 to BT709 or BT601 etc.
>>>>>>> +	* This block is generally kept after the degamma unit so that  
>>>>>>
>>>>>> Not "generally". If blocks can change places, then it becomes 
>>>>>> intractable for generic userspace to program.  
>>>>>
>>>>> Sure, will drop this wording here. But one open will still remain 
>>>>> for userspace, as to how it gets the pipeline dynamically for a respective hardware.
>>>>> Currently we have assumed that this would be the logical fixed order 
>>>>> of hardware units.  
>>>>
>>>> If we cannot model the abstract KMS pipeline as a fixed order of units 
>>>> (where each unit may exist or not), we need to take a few steps back 
>>>> here and look at what do we actually want to expose. That is a much 
>>>> bigger design problem which we are currently not even considering.  
>>>
>>> I think most of the hardware vendor platforms have this pipeline, so we can implement the properties which include all the possible hardware blocks. If certain units don't exist, the respective properties should not be exposed which will make things easier for userspace.  
>>
>> I think the color pipeline should be modeled in a way that makes
>> sense from a color science standpoint and in a way that makes sense
>> for compositor implementations. Fortunately HW design generally
>> aligns with these intentions but we should be careful to not
>> let HW design dictate KMS interfaces.
> 
> I'm so happy to hear that!
> 
> 
> Thanks,
> pq
> 


WARNING: multiple messages have this Message-ID (diff)
From: Harry Wentland <harry.wentland@amd.com>
To: Pekka Paalanen <ppaalanen@gmail.com>
Cc: "Shankar, Uma" <uma.shankar@intel.com>,
	"ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"brian.starkey@arm.com" <brian.starkey@arm.com>,
	"sebastian@sebastianwick.net" <sebastian@sebastianwick.net>,
	"Shashank.Sharma@amd.com" <Shashank.Sharma@amd.com>,
	"Cyr, Aric" <Aric.Cyr@amd.com>
Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
Date: Wed, 27 Oct 2021 08:48:13 -0400	[thread overview]
Message-ID: <a65548cd-2499-804a-895c-b1e723973f17@amd.com> (raw)
In-Reply-To: <20211027110057.72db81fa@eldfell>



On 2021-10-27 04:00, Pekka Paalanen wrote:
> On Tue, 26 Oct 2021 11:36:33 -0400
> Harry Wentland <harry.wentland@amd.com> wrote:
> 
>> On 2021-10-14 15:44, Shankar, Uma wrote:
>>>
> 

...

>> FWIW, AMD HW (depending on generation) can do these operations
>> (in this order):
>>
>> 1) 1D LUT (fixed or PWL programmable)
>> 2) simple multiplier (for scaling SDR content to HDR output)
>> 3) CTM matrix
>> 4) 1D LUT (shaper LUT to non-linearize for more effective 3D LUT transform)
>> 5) 3D LUT
>> 6) 1D LUT (for non-linear blending, or to linearize after 3D LUT)
>> 7) blending
>> 8) CTM matrix
>> 9) 1D LUT (shaper LUT like above)
>> 10) 3D LUT
>> 11) 1D LUT (generally for EOTF^-1 for display EOTF)
>>
>> Not all blocks are available on all (current and future) HW.
>>
>> I sketched a few diagrams that show how these might be used by
>> a compositor if we exposed all of these blocks and should
>> really try to add some of them to the color-and-hdr docs
>> repo.
> 
> Yes, please.
> 
> That pipeline looks pretty comprehensive.
> 
> Btw. how about YUV<->RGB conversion? Where would that matrix go? It
> needs to operate on non-linear values, while a color space conversion
> matrix needs to operate on linear color values.
> 

That is communicated via drm_framebuffer.format, and drm_plane's
color_range and color_encoding. I expect it to happen before
everything else, i.e. at step 0. It seems like any color management
implementation I've seen is always operating in RGB.

Harry

>>>>>>> +	* This can be used to perform a color space conversion like
>>>>>>> +	* BT2020 to BT709 or BT601 etc.
>>>>>>> +	* This block is generally kept after the degamma unit so that  
>>>>>>
>>>>>> Not "generally". If blocks can change places, then it becomes 
>>>>>> intractable for generic userspace to program.  
>>>>>
>>>>> Sure, will drop this wording here. But one open will still remain 
>>>>> for userspace, as to how it gets the pipeline dynamically for a respective hardware.
>>>>> Currently we have assumed that this would be the logical fixed order 
>>>>> of hardware units.  
>>>>
>>>> If we cannot model the abstract KMS pipeline as a fixed order of units 
>>>> (where each unit may exist or not), we need to take a few steps back 
>>>> here and look at what do we actually want to expose. That is a much 
>>>> bigger design problem which we are currently not even considering.  
>>>
>>> I think most of the hardware vendor platforms have this pipeline, so we can implement the properties which include all the possible hardware blocks. If certain units don't exist, the respective properties should not be exposed which will make things easier for userspace.  
>>
>> I think the color pipeline should be modeled in a way that makes
>> sense from a color science standpoint and in a way that makes sense
>> for compositor implementations. Fortunately HW design generally
>> aligns with these intentions but we should be careful to not
>> let HW design dictate KMS interfaces.
> 
> I'm so happy to hear that!
> 
> 
> Thanks,
> pq
> 


  reply	other threads:[~2021-10-27 12:48 UTC|newest]

Thread overview: 154+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-06 21:38 [Intel-gfx] [RFC v2 00/22] Add Support for Plane Color Lut and CSC features Uma Shankar
2021-09-06 21:38 ` Uma Shankar
2021-09-06 21:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add Support for Plane Color Lut and CSC features (rev2) Patchwork
2021-09-06 21:30 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-10-12 10:30   ` Pekka Paalanen
2021-10-12 10:30     ` [Intel-gfx] " Pekka Paalanen
2021-10-12 10:35     ` Simon Ser
2021-10-12 10:35       ` [Intel-gfx] " Simon Ser
2021-10-12 12:00       ` Pekka Paalanen
2021-10-12 12:00         ` [Intel-gfx] " Pekka Paalanen
2021-10-12 19:11         ` Shankar, Uma
2021-10-12 19:11           ` [Intel-gfx] " Shankar, Uma
2021-10-13  7:25           ` Pekka Paalanen
2021-10-13  7:25             ` [Intel-gfx] " Pekka Paalanen
2021-10-14 19:46             ` Shankar, Uma
2021-10-14 19:46               ` [Intel-gfx] " Shankar, Uma
2021-10-12 20:58     ` Shankar, Uma
2021-10-12 20:58       ` [Intel-gfx] " Shankar, Uma
2021-10-13  8:30       ` Pekka Paalanen
2021-10-13  8:30         ` [Intel-gfx] " Pekka Paalanen
2021-10-14 19:44         ` Shankar, Uma
2021-10-14 19:44           ` [Intel-gfx] " Shankar, Uma
2021-10-15  7:42           ` Pekka Paalanen
2021-10-15  7:42             ` [Intel-gfx] " Pekka Paalanen
2021-10-26 15:11             ` Harry Wentland
2021-10-26 15:11               ` [Intel-gfx] " Harry Wentland
2021-10-26 15:36           ` Harry Wentland
2021-10-26 15:36             ` [Intel-gfx] " Harry Wentland
2021-10-27  8:00             ` Pekka Paalanen
2021-10-27  8:00               ` [Intel-gfx] " Pekka Paalanen
2021-10-27 12:48               ` Harry Wentland [this message]
2021-10-27 12:48                 ` Harry Wentland
2021-10-26 15:40       ` Harry Wentland
2021-10-26 15:40         ` [Intel-gfx] " Harry Wentland
2021-11-23 15:05   ` Harry Wentland
2021-11-23 15:05     ` [Intel-gfx] " Harry Wentland
2021-11-25 20:43     ` Shankar, Uma
2021-11-25 20:43       ` [Intel-gfx] " Shankar, Uma
2021-11-26  8:21       ` Pekka Paalanen
2021-11-26  8:21         ` [Intel-gfx] " Pekka Paalanen
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 02/22] drm: Add Enhanced Gamma and color lut range attributes Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-11-03 15:08   ` Harry Wentland
2021-11-03 15:08     ` [Intel-gfx] " Harry Wentland
2021-11-04  8:38     ` Pekka Paalanen
2021-11-04  8:38       ` [Intel-gfx] " Pekka Paalanen
2021-11-04 16:27       ` Harry Wentland
2021-11-04 16:27         ` [Intel-gfx] " Harry Wentland
2021-11-05 11:49         ` Ville Syrjälä
2021-11-05 11:49           ` [Intel-gfx] " Ville Syrjälä
2021-11-09 20:22           ` Harry Wentland
2021-11-09 20:22             ` [Intel-gfx] " Harry Wentland
2021-11-08  9:54         ` Pekka Paalanen
2021-11-08  9:54           ` [Intel-gfx] " Pekka Paalanen
2021-11-09 20:47           ` Harry Wentland
2021-11-09 20:47             ` [Intel-gfx] " Harry Wentland
2021-11-09 22:02             ` Ville Syrjälä
2021-11-09 22:02               ` [Intel-gfx] " Ville Syrjälä
2021-11-10  8:49               ` Pekka Paalanen
2021-11-10  8:49                 ` [Intel-gfx] " Pekka Paalanen
2021-11-10 11:55                 ` Ville Syrjälä
2021-11-10 11:55                   ` [Intel-gfx] " Ville Syrjälä
2021-11-10 15:17                   ` Harry Wentland
2021-11-10 15:17                     ` [Intel-gfx] " Harry Wentland
2021-11-11  8:22                     ` Pekka Paalanen
2021-11-11  8:22                       ` [Intel-gfx] " Pekka Paalanen
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 03/22] drm: Add Plane Degamma Mode property Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-10-12 11:50   ` Pekka Paalanen
2021-10-12 11:50     ` [Intel-gfx] " Pekka Paalanen
2021-10-12 21:02     ` Shankar, Uma
2021-10-12 21:02       ` [Intel-gfx] " Shankar, Uma
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 04/22] drm: Add Plane Degamma Lut property Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 05/22] drm/i915/xelpd: Define Degamma Lut range struct for HDR planes Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-11-03 15:10   ` Harry Wentland
2021-11-03 15:10     ` [Intel-gfx] " Harry Wentland
2021-11-05 12:59     ` Ville Syrjälä
2021-11-05 12:59       ` [Intel-gfx] " Ville Syrjälä
2021-11-09 20:19       ` Harry Wentland
2021-11-09 20:19         ` [Intel-gfx] " Harry Wentland
2021-11-09 21:45         ` Ville Syrjälä
2021-11-09 21:45           ` [Intel-gfx] " Ville Syrjälä
2021-11-09 21:56           ` Harry Wentland
2021-11-09 21:56             ` [Intel-gfx] " Harry Wentland
2021-11-11 15:17   ` Harry Wentland
2021-11-11 15:17     ` [Intel-gfx] " Harry Wentland
2021-11-11 16:42     ` Ville Syrjälä
2021-11-11 16:42       ` [Intel-gfx] " Ville Syrjälä
2021-11-11 20:42       ` Shankar, Uma
2021-11-11 20:42         ` [Intel-gfx] " Shankar, Uma
2021-11-11 21:10         ` Harry Wentland
2021-11-11 21:10           ` [Intel-gfx] " Harry Wentland
2021-11-11 21:58           ` Shankar, Uma
2021-11-11 21:58             ` [Intel-gfx] " Shankar, Uma
2021-11-12  8:37             ` Pekka Paalanen
2021-11-12  8:37               ` [Intel-gfx] " Pekka Paalanen
2021-11-23 14:40               ` Harry Wentland
2021-11-23 14:40                 ` [Intel-gfx] " Harry Wentland
2021-11-12 14:54           ` Ville Syrjälä
2021-11-12 14:54             ` [Intel-gfx] " Ville Syrjälä
2021-11-16  8:15             ` Pekka Paalanen
2021-11-16  8:15               ` [Intel-gfx] " Pekka Paalanen
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 06/22] drm/i915/xelpd: Add register definitions for Plane Degamma Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 07/22] drm/i915/xelpd: Enable plane color features Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 08/22] drm/i915/xelpd: Add color capabilities of SDR planes Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 09/22] drm/i915/xelpd: Program Plane Degamma Registers Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 10/22] drm/i915/xelpd: Add plane color check to glk_plane_color_ctl Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [Intel-gfx] [RFC v2 11/22] drm/i915/xelpd: Initialize plane color features Uma Shankar
2021-09-06 21:38   ` Uma Shankar
2021-09-06 21:38 ` [RFC v2 12/22] drm/i915/xelpd: Load plane color luts from atomic flip Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 13/22] drm: Add Plane CTM property Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 14/22] drm: Add helper to attach Plane ctm property Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 15/22] drm/i915/xelpd: Define Plane CSC Registers Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 16/22] drm/i915/xelpd: Enable Plane CSC Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:38 ` [RFC v2 17/22] drm: Add Plane Gamma Mode property Uma Shankar
2021-09-06 21:38   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 18/22] drm: Add Plane Gamma Lut property Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 19/22] drm/i915/xelpd: Define and Initialize Plane Gamma Lut range Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 20/22] drm/i915/xelpd: Add register definitions for Plane Gamma Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 21/22] drm/i915/xelpd: Program Plane Gamma Registers Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:39 ` [RFC v2 22/22] drm/i915/xelpd: Enable plane gamma Uma Shankar
2021-09-06 21:39   ` [Intel-gfx] " Uma Shankar
2021-09-06 21:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add Support for Plane Color Lut and CSC features (rev2) Patchwork
2021-09-06 23:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-12 11:55 ` [RFC v2 00/22] Add Support for Plane Color Lut and CSC features Pekka Paalanen
2021-10-12 11:55   ` [Intel-gfx] " Pekka Paalanen
2021-10-12 21:01   ` Shankar, Uma
2021-10-12 21:01     ` [Intel-gfx] " Shankar, Uma
2021-10-26 15:02     ` Harry Wentland
2021-10-26 15:02       ` [Intel-gfx] " Harry Wentland
2021-10-27  8:18       ` Pekka Paalanen
2021-10-27  8:18         ` [Intel-gfx] " Pekka Paalanen
2022-02-02 16:11 ` Harry Wentland
2022-02-02 16:11   ` [Intel-gfx] " Harry Wentland
2022-02-03 17:22   ` Shankar, Uma
2022-02-03 17:22     ` [Intel-gfx] " Shankar, Uma

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