From: David Laight <David.Laight@ACULAB.COM>
To: 'Geert Uytterhoeven' <geert@linux-m68k.org>,
Marc Kleine-Budde <mkl@pengutronix.de>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"wg@grandegger.com" <wg@grandegger.com>,
"linux-can@vger.kernel.org" <linux-can@vger.kernel.org>,
Linux-sh list <linux-sh@vger.kernel.org>,
Pavel Kiryukhin <vksavl@gmail.com>
Subject: RE: [PATCH v5] can: add Renesas R-Car CAN driver
Date: Fri, 28 Feb 2014 11:47:27 +0000 [thread overview]
Message-ID: <063D6719AE5E284EB5DD2968C1650D6D0F6CDBD9@AcuExch.aculab.com> (raw)
In-Reply-To: <CAMuHMdUuaX0pGmdOuJ9CJwj-ZTYo4PqTtZmYHh8swamQ754s2A@mail.gmail.com>
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WARNING: multiple messages have this Message-ID (diff)
From: David Laight <David.Laight@ACULAB.COM>
To: 'Geert Uytterhoeven' <geert@linux-m68k.org>,
Marc Kleine-Budde <mkl@pengutronix.de>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"wg@grandegger.com" <wg@grandegger.com>,
"linux-can@vger.kernel.org" <linux-can@vger.kernel.org>,
Linux-sh list <linux-sh@vger.kernel.org>,
Pavel Kiryukhin <vksavl@gmail.com>
Subject: RE: [PATCH v5] can: add Renesas R-Car CAN driver
Date: Fri, 28 Feb 2014 11:47:27 +0000 [thread overview]
Message-ID: <063D6719AE5E284EB5DD2968C1650D6D0F6CDBD9@AcuExch.aculab.com> (raw)
In-Reply-To: <CAMuHMdUuaX0pGmdOuJ9CJwj-ZTYo4PqTtZmYHh8swamQ754s2A@mail.gmail.com>
From: Geert Uytterhoeven
> On Fri, Feb 28, 2014 at 12:37 PM, Marc Kleine-Budde <mkl@pengutronix.de> wrote:
> >>> A 32 bit read/modify/write is a standard operation, nothing special, no
> >>> need to worry about byte swapping or anything like this.
> >>
> >> Oh, really? 8-)
> >> Don't you know that read[bwlq]() assume little-endian memory layout
> >> and to read from big-endian 32-bit register one normally needs readl_be()?
> >
> > I assume you are on little endian ARM only (for now).
> >
> > If you use a standard 32 bit read, then modify the correct bits in that
> > 32 bit word and write it back, with the corresponding 32 bit write
> > everything should be fine. For this usecase you just have yo figure out
> > which 24 of the 32 bit are the one you have to change and which are the
> > 8 that must not be modified.
> >
> > Looking at the register layout:
> >
> >> + u8 bcr[3]; /* Bit Configuration Register */
> >> + u8 clkr; /* Clock Select Register */
> >
> > I think clkr would be the lowest 8 bit and bcr[] are the upper 24.
>
> That would be the outcome on big endian ;-)
Looks to me as though it should be defined as a 32bit field and then
the appropriate bit definitions and masks applied.
David
next prev parent reply other threads:[~2014-02-28 11:47 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-26 20:37 [PATCH v5] can: add Renesas R-Car CAN driver Sergei Shtylyov
2013-12-26 21:37 ` Sergei Shtylyov
2014-01-13 13:46 ` Sergei Shtylyov
2014-01-13 13:46 ` Sergei Shtylyov
2014-01-20 9:18 ` Marc Kleine-Budde
2014-01-20 9:18 ` Marc Kleine-Budde
2014-01-25 0:34 ` Sergei Shtylyov
2014-01-25 1:34 ` Sergei Shtylyov
2014-02-13 12:12 ` Marc Kleine-Budde
2014-02-13 12:12 ` Marc Kleine-Budde
2014-02-20 22:48 ` Sergei Shtylyov
2014-02-20 23:48 ` Sergei Shtylyov
2014-02-28 9:08 ` Marc Kleine-Budde
2014-02-28 9:08 ` Marc Kleine-Budde
2014-02-28 11:16 ` Sergei Shtylyov
2014-02-28 11:16 ` Sergei Shtylyov
2014-02-28 11:37 ` Marc Kleine-Budde
2014-02-28 11:37 ` Marc Kleine-Budde
2014-02-28 11:41 ` Geert Uytterhoeven
2014-02-28 11:41 ` Geert Uytterhoeven
2014-02-28 11:47 ` David Laight [this message]
2014-02-28 11:47 ` David Laight
2014-02-28 11:50 ` Marc Kleine-Budde
2014-02-28 11:50 ` Marc Kleine-Budde
2014-02-28 12:02 ` David Laight
2014-02-28 12:02 ` David Laight
2014-02-28 11:49 ` Marc Kleine-Budde
2014-02-28 11:49 ` Marc Kleine-Budde
2014-02-28 12:05 ` Sergei Shtylyov
2014-02-28 12:05 ` Sergei Shtylyov
2014-02-28 12:17 ` David Laight
2014-02-28 12:17 ` David Laight
2014-02-28 12:34 ` Sergei Shtylyov
2014-02-28 12:34 ` Sergei Shtylyov
2014-01-20 11:43 ` Geert Uytterhoeven
2014-01-20 11:43 ` Geert Uytterhoeven
2014-01-20 11:47 ` Marc Kleine-Budde
2014-01-20 11:47 ` Marc Kleine-Budde
2014-01-20 11:52 ` Geert Uytterhoeven
2014-01-20 11:52 ` Geert Uytterhoeven
2014-01-20 11:58 ` Marc Kleine-Budde
2014-01-20 11:58 ` Marc Kleine-Budde
2014-01-20 12:02 ` Ben Dooks
2014-01-20 12:05 ` Geert Uytterhoeven
2014-01-20 12:05 ` Geert Uytterhoeven
2014-01-20 12:08 ` Marc Kleine-Budde
2014-01-20 12:08 ` Marc Kleine-Budde
2014-01-20 12:05 ` Marc Kleine-Budde
2014-01-20 12:05 ` Marc Kleine-Budde
2014-01-20 12:13 ` David Laight
2014-01-20 12:13 ` David Laight
2014-01-20 12:35 ` Marc Kleine-Budde
2014-01-20 12:35 ` Marc Kleine-Budde
2014-01-20 19:16 ` David Miller
2014-01-20 19:16 ` David Miller
2014-01-20 21:12 ` Sergei Shtylyov
2014-01-20 22:12 ` Sergei Shtylyov
2014-01-20 21:17 ` Marc Kleine-Budde
2014-01-20 21:17 ` Marc Kleine-Budde
2014-01-22 11:52 ` Ben Dooks
2014-01-22 11:54 ` Geert Uytterhoeven
2014-01-22 11:54 ` Geert Uytterhoeven
2014-01-22 11:58 ` David Laight
2014-01-22 11:58 ` David Laight
2014-01-20 12:12 ` Sergei Shtylyov
2014-01-20 12:12 ` Sergei Shtylyov
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